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參數(shù)資料
| 型號(hào)： | M13S256328A |
| 廠商： | Elite Semiconductor Memory Technology Inc. |
| 英文描述： | 2M x 32 Bit x 4 Banks Double Data Rate SDRAM |
| 中文描述： | 200萬× 32位× 4個(gè)銀行雙倍數(shù)據(jù)速率SDRAM |
| 文件頁數(shù)： | 24/47頁 |
| 文件大?。?/td> | 807K |
| 代理商： | M13S256328A |
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ES MT
M13S256328A
Elite Semiconductor Memory Technology Inc.
Publication Date : May. 2007
Revision : 1.2 24/47
Read With Auto Precharge
If a read with auto-precharge command is initiated, the DDR SDRAM automatically enters the precharge operation BL/2
clock later from a read with auto-precharge command when t
RAS
(min) is satisfied. If not, the start point of precharge operation
will be delayed until t
RAS
(min) is satisfied. Once the precharge operation has started the bank cannot be reactivated and the
new command can not be asserted until the precharge time (t
RP
) has been satisfied
<Burst Length = 4, CAS Latency = 3>
0
1
2
CL K
C LK
3
4
5
6
7
8
COMMAND
B a nk A
NOP
NOP
NOP
NOP
NOP
NOP
NOP
R ea d A
Auto Pre cha rg e
CA S Lat en cy = 3
DQS
DQ's
Dout 0 Dout 1 Dout 2 Dout 3
t
R AP
At burst read / write with auto precharge, CAS interrupt of the same bank is illegal.
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| M13S32321A | 256K x 32 Bit x 4 Banks Double Data Rate SDRAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M13S256328A-5BG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 32 Bit x 4 Banks Double Data Rate SDRAM |
| M13S32321A | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:256K x 32 Bit x 4 Banks Double Data Rate SDRAM |
| M13S32321A_08 | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:256K x 32 Bit x 4 Banks Double Data Rate SDRAM |
| M13S32321A-5L | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:256K x 32 Bit x 4 Banks Double Data Rate SDRAM |
| M13S32321A-6L | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:256K x 32 Bit x 4 Banks Double Data Rate SDRAM |
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