- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377801 > M13S32321A (Elite Semiconductor Memory Technology Inc.) 256K x 32 Bit x 4 Banks Double Data Rate SDRAM PDF資料下載
參數(shù)資料
| 型號： | M13S32321A |
| 廠商： | Elite Semiconductor Memory Technology Inc. |
| 英文描述： | 256K x 32 Bit x 4 Banks Double Data Rate SDRAM |
| 中文描述： | 256K × 32位× 4個銀行雙倍數(shù)據(jù)速率SDRAM |
| 文件頁數(shù)： | 17/49頁 |
| 文件大小： | 769K |
| 代理商： | M13S32321A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁當前第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁
ES MT
M13S32321A
Elite Semiconductor Memory Technology Inc.
Publication Date : Sep. 2006
Revision : 1.0 17/49
Burst Write Operation
The Burst Write command is issued by having CS , CAS and
WE
low while holding RAS high at the rising edge of the
clock (CLK). The address inputs determine the starting column address. There is no write latency relative to DQS required for burst
write cycle. The first data of a burst write cycle must be applied on the DQ pins t
DS
(Data-in setup time) prior to data strobe edge
enabled after t
DQSS
from the rising edge of the clock (CLK) that the write command is issued. The remaining data inputs must be
supplied on each subsequent falling and rising edge of Data Strobe until the burst length is completed. When the burst has been
finished, any additional data supplied to the DQ pins will be ignored.
<Burst Length = 4>
0
1
2
3
4
5
6
7
8
CO MM AN D
DQS
DQ 's
NOP
W RITE
NOP
NOP
NOP
NOP
NOP
NOP
t
D Q S S
t
W P S T
D i n 0
D i n 1
D i n 2
D i n 3
t
W P R E S
C L K
C L K
t
D S H
t
D S S
NOP
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M13S64164A-6BG | 1M x 16 Bit x 4 Banks Double Data Rate SDRAM |
| M13S64164A | 1M x 16 Bit x 4 Banks Double Data Rate SDRAM |
| M13S64164A-5BG | 1M x 16 Bit x 4 Banks Double Data Rate SDRAM |
| M13S64164A-5TG | 1M x 16 Bit x 4 Banks Double Data Rate SDRAM |
| M13S64164A-6TG | 1M x 16 Bit x 4 Banks Double Data Rate SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M13S32321A_08 | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:256K x 32 Bit x 4 Banks Double Data Rate SDRAM |
| M13S32321A-5L | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:256K x 32 Bit x 4 Banks Double Data Rate SDRAM |
| M13S32321A-6L | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:256K x 32 Bit x 4 Banks Double Data Rate SDRAM |
| M13S5121632A | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:8M x 16 Bit x 4 Banks Double Data Rate SDRAM |
| M13S5121632A-5TG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:8M x 16 Bit x 4 Banks Double Data Rate SDRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復。