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參數(shù)資料
| 型號(hào)： | M25PE16-VMP6TP |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | 4 Mbit Uniform Sector, Serial Flash Memory |
| 中文描述： | 4兆位統(tǒng)一部門，串行閃存 |
| 文件頁數(shù)： | 39/56頁 |
| 文件大?。?/td> | 334K |
| 代理商： | M25PE16-VMP6TP |
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M25PE16
Instructions
39/56
6.14
SubSector Erase (SSE)
The SubSector Erase (SSE) instruction sets to 1 (FFh) all bits inside the chosen subsector.
Before it can be accepted, a Write Enable (WREN) instruction must previously have been
executed. After the Write Enable (WREN) instruction has been decoded, the device sets the
Write Enable Latch (WEL).
The SubSector Erase (SE) instruction is entered by driving Chip Select (S) Low, followed by
the instruction code, and three address Bytes on Serial Data Input (D). Any address inside
the SubSector (see
Table 4
) is a valid address for the SubSector Erase (SE) instruction.
Chip Select (S) must be driven Low for the entire duration of the sequence.
The instruction sequence is shown in
Figure 18
.
Chip Select (S) must be driven High after the eighth bit of the last address Byte has been
latched in, otherwise the SubSector Erase (SE) instruction is not executed. As soon as Chip
Select (S) is driven High, the self-timed SubSector Erase cycle (whose duration is t
SSE
) is
initiated. While the SubSector Erase cycle is in progress, the Status Register may be read to
check the value of the Write In Progress (WIP) bit. The Write In Progress (WIP) bit is 1
during the self-timed SubSector Erase cycle, and is 0 when it is completed. At some
unspecified time before the cycle is complete, the Write Enable Latch (WEL) bit is reset.
A SubSector Erase (SSE) instruction applied to a subsector that contains a page that is
Hardware or software Protected is not executed.
Any SubSector Erase (SSE) instruction, while an Erase, Program or Write cycle is in
progress, is rejected without having any effects on the cycle that is in progress.
If Reset (RESET) is driven Low while a SubSector Erase (SSE) cycle is in progress, the
SubSector Erase cycle is interrupted and data may not be erased correctly (see
Table 12:
Device status after a RESET Low pulse
). On RESET going Low, the device enters the Reset
mode and a time of t
RHSL
is then required before the device can be re-selected by driving
Chip Select (S) Low. For the value of t
RHSL
see
Table 20: Timings after a RESET Low pulse
in
Section 11: DC and AC parameters
.
Figure 19.
SubSector Erase (SSE)
instruction sequence
1.
Address bits A23 to A21 are Don’t Care.
24 Bit Address
C
D
AI12356
S
2
1
3
4
5
6
7
8
9
29 30 31
Instruction
0
23 22
2
0
1
MSB
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M25PE16-VMW6G | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE16-VMW6P | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE16-VMW6TG | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE16-VMW6TP | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE40 | 4 Mbit Uniform Sector, Serial Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M25PE16-VMW6G | 功能描述:閃存 16 Mbit Lo Vltg Page Erasable Seral 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| M25PE16-VMW6P | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:16-Mbit, page-erasable serial flash memory with byte-alterability, 75 MHz SPI bus, standard pinout |
| M25PE16-VMW6TG | 功能描述:閃存 16 Mbit Lo Vltg Page Erasable Seral 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| M25PE16-VMW6TP | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:16-Mbit, page-erasable serial flash memory with byte-alterability, 75 MHz SPI bus, standard pinout |
| M25PE20 | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:1 and 2 Mbit, page-erasable serial Flash memories with byte alterability, 75 MHz SPI bus, standard pinout |
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