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Page 168
21. A/D Converter
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Figure 21.2 A/D converter-related registers (1)
A/D control register 0 (Note 1)
Symbol
Address
When reset
ADCON0
039616
00000XXX2
b7
b6
b5
b4
b3
b2
b1
b0
Analog input pin select bit
0 0 0 : AN0 is selected
0 0 1 : AN1 is selected
0 1 0 : AN2 is selected
0 1 1 : AN3 is selected
1 0 0 : AN4 is selected
1 0 1 : AN5 is selected
1 1 0 : AN6 is selected
1 1 1 : AN7 is selected
(Note 2)
CH0
Bit symbol
Bit name
Function
CH1
CH2
A/D operation mode select
bit 0
0 0 : One-shot mode
0 1 : Repeat mode
1 0 : Single sweep mode
1 1 : Repeat sweep mode 0
(Note 2)
Repeat sweep mode 1
MD0
MD1
Trigger select bit
0 : Software trigger
1 : ADTRG trigger
TRG
ADST
A/D conversion start flag
0 : A/D conversion disabled
1 : A/D conversion started
Frequency select bit 0
0 : fAD/4 is selected
1 : fAD/2 is selected
CKS0
W
R
A/D control register 1 (Note 1)
Symbol
Address
When reset
ADCON1
039716
0016
Bit name
Function
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
A/D sweep pin
select bit
SCAN0
SCAN1
MD2
BITS
8/10-bit mode select
bit
0 : 8-bit mode
1 : 10-bit mode
VCUT
OPA0
Vref connect bit
OPA1
A/D operation mode
select bit 1
0 : Any mode other than repeat sweep mode 1
1 : Repeat sweep mode 1
0 : Vref not connected
1 : Vref connected
External op-amp
connection mode bit
W
R
b2 b1 b0
b4 b3
When single sweep and repeat sweep
mode 0 are selected
0 0 : AN0, AN1 (2 pins)
0 1 : AN0 to AN3 (4 pins)
1 0 : AN0 to AN5 (6 pins)
1 1 : AN0 to AN7 (8 pins)
b1 b0
When repeat sweep mode 1 is selected
0 0 : AN0 (1 pin)
0 1 : AN0, AN1 (2 pins)
1 0 : AN0 to AN2 (3 pins)
1 1 : AN0 to AN3 (4 pins)
b1 b0
0 0 : ANEX0 and ANEX1 are not used(Note 3)
0 1 : ANEX0 input is A/D converted(Note 4)
1 0 : ANEX1 input is A/D converted(Note 5)
1 1 : External op-amp connection mode(Note 6)
b7 b6
Note 1: If the A/D control register is rewritten during A/D conversion, the conversion result is indeterminate.
Note 2: When changing A/D operation mode, set analog input pin again.
Frequency select bit
1 (Note 2)
0 : fAD/2 or fAD/4 is selected
1 : fAD is selected
CKS1
Note 1: If the A/D control register is rewritten during A/D conversion, the conversion result is indeterminate.
Note 2: When f(XIN) is over 10 MHz, the fAD frequency must be under 10 MHz by dividing.
Note 3: Set "0" to PSL3_5 and PSL3_6 of the function select register B3.
Note 4: Set "1" to PSL3_5 of the function select register B3.
Note 5: Set "1" to PSL3_6 of the function select register B3.
Note 6: Set "1" to PSL3_5 and PSL3_6 of the function select register B3.