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Page 174
21. A/D Converter
p
u
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r
G
0
8
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6
1
M
Item
Specification
Function
All pins perform repeat sweep A/D conversion, with emphasis on the pin or
pins selected by the A/D sweep pin select bit
Example : AN0 selected
AN0
AN1
AN0
AN2
AN0
AN3, etc
Start condition
Writing “1” to A/D conversion start flag
Stop condition
Writing “0” to A/D conversion start flag
Interrupt request generation timing None generated
Input pin
AN0 to AN7
With emphasis on the pin
AN0 (1 pin), AN0 and AN1 (2 pins), AN0 to AN2 (3 pins), AN0 to AN3 (4 pins)
Reading of result of A/D converter Read A/D register corresponding to selected pin (at any time)
(5) Repeat sweep mode 1
In repeat sweep mode 1, all pins are used for A/D conversion with emphasis on the pin or pins selected
using the A/D sweep pin select bit. Table 21.6 shows the specifications of repeat sweep mode 1. Figure
21.8 shows the A/D control register in repeat sweep mode 1.
A/D control register 0 (Note)
Symbol
Address
When reset
ADCON0
039616
00000XXX2
b7
b6
b5
b4
b3
b2
b1
b0
Analog input pin
select bit
CH0
Bit symbol
Bit name
Function
CH1
CH2
A/D operation mode
select bit 0
1 1 : Repeat sweep mode 1
MD0
MD1
Trigger select bit
0 : Software trigger
1 : ADTRG trigger
TRG
ADST
A/D conversion start flag
0 : A/D conversion disabled
1 : A/D conversion started
Frequency select bit 0
0 : fAD/4 is selected
1 : fAD/2 is selected
CKS0
W
R
A/D control register 1 (Note 1)
Symbol
Address
When reset
ADCON1
039716
0016
Bit name
Function
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
A/D sweep pin select bit
SCAN0
SCAN1
MD2
BITS
8/10-bit mode select bit
0 : 8-bit mode
1 : 10-bit mode
VCUT
OPA0
Vref connect bit
1 : Repeat sweep mode 1
OPA1
A/D operation mode
select bit 1
1 : Vref connected
External op-amp
connection mode
bit (Note 2)
W
R
1
Invalid in repeat sweep mode 1
1
b4 b3
When repeat sweep mode 1 is selected
0 0 : AN0 (1 pin)
0 1 : AN0, AN1 (2 pins)
1 0 : AN0 to AN2 (3 pins)
1 1 : AN0 to AN3 (4 pins)
b1 b0
b7 b6
1
Note: If the A/D control register is rewritten during A/D conversion, the conversion result is indeterminate.
0 : fAD/2 or fAD/4 is selected
1 : fAD is selected
CKS1
Frequency select bit 1
(Note 3)
Note 1: If the A/D control register is rewritten during A/D conversion, the conversion result is indeterminate.
Note 2: Neither ‘01’ nor ‘10’ can be selected with the external op-amp connection mode bit.
Note 3: When f(XIN) is over 10 MHz, the fAD frequency must be under 10 MHz by dividing.
Note 4: Set "0" to PSL3_5 and PSL3_6 of the function select register B3.
Note 5: Set "1" to PSL3_5 of the function select register B3.
Note 6: Set "1" to PSL3_6 of the function select register B3.
Note 7: Set "1" to PSL3_5 and PSL3_6 of the function select register B3.
0 0 : ANEX0 and ANEX1 are not used(Note 4)
0 1 : ANEX0 input is A/D converted(Note 5)
1 0 : ANEX1 input is A/D converted(Note 6)
1 1 : External op-amp connection mode(Note 7)
Figure 21.8 A/D conversion register in repeat sweep mode 1
Table 21.6 Repeat sweep mode 1 specifications