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Under
development
Preliminary Specifications REV.B3
Specifications in this manual are tentative and subject to change.
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER
Timer B
151
(2) Event counter mode
In this mode, the timer counts an external signal or an internal timer's overflow. (See Table 1.15.2.)
Figure 1.15.6 shows the timer Bi mode register in event counter mode.
Table 1.15.2. Timer specifications in event counter mode
Item
Specification
Count source
External signals input to TBiIN pin
Effective edge of count source can be a rising edge, a falling edge, or falling and
rising edges as selected by software
TBj overflows or underflows
Count operation
Counts down
When the timer underflows, it reloads the reload register contents before continuing
counting
Divide ratio
1/(n+1)
n : Set value
Count start condition
Count start flag is set (= 1)
Count stop condition
Count start flag is reset (= 0)
Interrupt request generation timing The timer underflows
TBiIN pin function
Count source input (Set the corresponding function select register A to I/O port.)
Read from timer
Count value can be read out by reading timer Bi register
Write to timer
When counting stopped
When a value is written to timer Bi register, it is written to both reload register and
counter
When counting in progress
When a value is written to timer Bi register, it is written to only reload register
(Transferred to counter at next reload time)
Timer Bi mode register (i = 0 to 5) (Event counter mode)
Bit name
Function
Bit symbol
W
R
b7
b6
b5
b4
b3
b2
b1
b0
Operation mode
select bit
0 1 : Event counter mode
b1 b0
TMOD1
TMOD0
MR0
Count polarity select
bit
MR2
MR1
MR3
Nothing is assigned. (i = 1, 2, 4, 5)
When write, set “0”. When read, its content is indeterminate.
TCK1
TCK0
0 0 : Counts external signal's falling edges
0 1 : Counts external signal's rising edges
1 0 : Counts external signal's falling and
rising edges
1 1 : Inhibited
b3 b2
Note 1: Valid only when input from the TBiIN pin is selected as the event clock.
If timer's overflow is selected, this bit can be “0” or “1”.
Note 2: R/W is valid only in timer B0 and timer B3.
Note 3: In timer B1, timer B2, timer B4 and timer B5, nothing is assigned by bit 4(There is not R/W).
When write, set “0”. When read, its content is indeterminate.
Note 4: Set the corresponding function select register A to I/O port, and port direction register to “0”.
Note 5: j = i – 1; however, j = 2 when i = 0, j = 5 when i = 3.
Invalid in event counter mode.
Can be “0” or “1”.
Event clock select bit 0 : Input from TBiIN pin
1 : TBj overflow
0 (Set to “0” in event counter mode)
Symbol
Address
When reset
TBiMR(i=0 to 5)
035B16, 035C16, 035D16, 031B16, 031C16, 031D16
00XX00002
(Note 1)
(Note 3)
(Note 4)
(Note 5)
Invalid in event counter mode. When write, set "0". When
read in event counter mode, its content is indeterminate.
(Note 2)
Figure 1.15.6. Timer Bi mode register in event counter mode