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參數(shù)資料
| 型號： | M36L0R7050B0ZAQE |
| 廠商： | 意法半導體 |
| 英文描述： | ER 23C 16 12 8 4 SKT RECP WALL |
| 中文描述： | 128兆位（多銀行，多層次，突發(fā)）閃存32兆位（200萬× 16）移動存儲芯片，1.8V電源多芯片封裝 |
| 文件頁數(shù)： | 4/18頁 |
| 文件大?。?/td> | 406K |
| 代理商： | M36L0R7050B0ZAQE |
M36L0R7050T0, M36L0R7050B0
4/18
SUMMARY DESCRIPTION
The M36L0R7050T0 and M36L0R7050B0 com-
bine two memory devices in a Multi-Chip Package:
a 128-Mbit, Multiple Bank Flash memory, the
M30L0R7000T0 or M30L0R7000B0, and a 32-
Mbit PseudoSRAM, the M69AR048B. Recom-
mended operating conditions do not allow more
than one memory to be active at the same time.
The memory is offered in a Stacked TFBGA88
(8x10mm, 8x10 ball array, 0.8mm pitch) package.
In addition to the standard version, the packages
are also available in Lead-free version, in compli-
ance with JEDEC Std J-STD-020B, the ST ECO-
PACK 7191395 Specification, and the RoHS
(Restriction of Hazardous Substances) directive.
All packages are compliant with Lead-free solder-
ing processes.
The memory is supplied with all the bits erased
(set to ‘1’).
Figure 2. Logic Diagram
Table 1. Signal Names
Note: 1. A22-A21 are not connected to the PSRAM component.
AI08731
23
A0-A22
DQ0-DQ15
M36L0R7050T0
M36L0R7050B0
G
F
16
W
F
RP
F
WP
F
E1
P
G
P
W
P
UB
P
LB
P
VSS
V
DDF
V
PPF
V
DDP
WAIT
F
L
F
K
F
V
DDQ
E
F
E2
P
A0-A22
(1)
Address Inputs
DQ0-DQ15
Common Data Input/Output
V
DDF
Power Supply for Flash Memory
V
DDQ
Flash Memory Power Supply for I/O
Buffers
V
PPF
Flash Optional Supply Voltage for Fast
Program and Erase
V
SS
Ground
V
DDP
PSRAM Power Supply
NC
Not Connected Internally
DU
Do Not Use as Internally Connected
Flash Memory
L
F
Latch Enable Input
E
F
Chip Enable Input
G
F
Output Enable Input
W
F
Write Enable Input
RP
F
Reset Input
WP
F
Write Protect Input
K
F
Burst Clock
WAIT
F
Wait Data in Burst Mode
PSRAM
E1
P
Chip Enable Input
G
P
Output Enable Input
W
P
Write Enable Input
E2
P
Power-down Input
UB
P
Upper Byte Enable Input
LB
P
Lower Byte Enable Input
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M36L0R7050T0ZAQE | AB 6C 2#0 4#4 SKT RECP |
| M36L0R7050T0ZAQT | 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 32 Mbit (2M x16) PSRAM, 1.8V Supply Multi-Chip Package |
| M36L0R7050T0ZAQF | 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 32 Mbit (2M x16) PSRAM, 1.8V Supply Multi-Chip Package |
| M36W108 | 8 Mbit 1Mb x8, Boot Block Flash Memory and 1 Mbit 128Kb x8 SRAM Low Voltage Multi-Memory Product |
| M36W108ATZM | 8 Mbit 1Mb x8, Boot Block Flash Memory and 1 Mbit 128Kb x8 SRAM Low Voltage Multi-Memory Product |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M36L0R7050B0ZAQF | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 32 Mbit (2M x16) PSRAM, 1.8V Supply Multi-Chip Package |
| M36L0R7050B0ZAQT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 32 Mbit (2M x16) PSRAM, 1.8V Supply Multi-Chip Package |
| M36L0R7050B1ZAQE | 制造商:Micron Technology Inc 功能描述:128M (8MX16) FLASH, 32M PSRAM, 1.8V, TFBGA88, IND, HAZMAT - Trays |
| M36L0R7050B3ZAQE | 制造商:Micron Technology Inc 功能描述:WIRELESS - Trays |
| M36L0R7050B3ZAQF | 制造商:Micron Technology Inc 功能描述:WIRELESS - Tape and Reel |
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