參數(shù)資料
型號: M38049FFLWG
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 16.8 MHz, MICROCONTROLLER, PBGA64
封裝: 6 X 6 MM, 0.65 MM PITCH, PLASTIC, LGA-64
文件頁數(shù): 130/131頁
文件大?。?/td> 1740K
代理商: M38049FFLWG
Rev.1.00
Oct 27, 2008
Page 96 of 128
REJ03B0266-0100
3804 Group (Spec.L)
Table 20 Description of pin function (Flash Memory Serial I/O Mode 1)
Pin name
Signal name
I/O
Function
VCC,VSS
Power supply
I
Apply 2.7 to 5.5 V to the VCC pin and 0 V to the VSS pin.
CNVSS
I
After input of port is set, input “H” level.
RESET
Reset input
I
Reset input pin. To reset the microcomputer, RESET pin should be
held at an “L” level for 16 cycles or more of XIN.
XIN
Clock input
I
Connect an oscillation circuit between the XIN and XOUT pins.
As for the connection method, refer to the “clock generating circuit”.
XOUT
Clock output
O
AVSS
Analog power supply input
Connect AVSS to VSS.
VREF
Reference voltage input
I
Apply reference voltage of A/D to this pin.
P00
P07, P10P17,
P20
P27, P30P37,
P40
P43, P50P57,
P60
P67
I/O port
I/O
Input “L” or “H” level, or keep open.
P44
RxD input
I
Serial data input pin.
P45
TxD output
O
Serial data output pin.
P46
SCLK input
I
Serial clock input pin.
P47
BUSY output
O
BUSY signal output pin.
Table 21 Description of pin function (Flash Memory Serial I/O Mode 2)
Pin name
Signal name
I/O
Function
VCC,VSS
Power supply
I
Apply 2.7 to 5.5 V to the VCC pin and 0 V to the VSS pin.
CNVSS
I
After input of port is set, input “H” level.
RESET
Reset input
I
Reset input pin. To reset the microcomputer, RESET pin should be
held at an “L” level for 16 cycles or more of XIN.
XIN
Clock input
I
Connect an oscillation circuit between the XIN and XOUT pins.
As for the connection method, refer to the “clock generating circuit”.
XOUT
Clock output
O
AVSS
Analog power supply input
Connect AVSS to VSS.
VREF
Reference voltage input
I
Apply reference voltage of A/D to this pin.
P00
P07, P10P17,
P20
P27, P30P37,
P40
P43, P50P57,
P60
P67
I/O port
I/O
Input “L” or “H” level, or keep open.
P44
RxD input
I
Serial data input pin.
P45
TxD output
O
Serial data output pin.
P46
SCLK input
I
Input “L” level.
P47
BUSY output
O
BUSY signal output pin.
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