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參數(shù)資料
| 型號： | M48Z19-100PC1 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | CMOS 8K x 8 ZEROPOWER SRAM |
| 中文描述： | 的CMOS 8K的× 8 ZEROPOWER的SRAM |
| 文件頁數(shù)： | 4/13頁 |
| 文件大?。?/td> | 122K |
| 代理商： | M48Z19-100PC1 |
Symbol
Parameter
Test Condition
Min
Max
Unit
I
LI
Input Leakage Current
0V
≤
V
IN
≤
V
CC
±
1
μ
A
I
LO
Output Leakage Current
0V
≤
V
OUT
≤
V
CC
±
5
μ
A
I
CC
Supply Current
Outputs open
80
mA
I
CC1
Supply Current (Standby) TTL
E1 = V
IH
, E2 = V
IL
3
mA
I
CC2
Supply Current (Standby) CMOS
E1 = V
CC
– 0.2V,
E2 = V
SS
+ 0.2V
3
mA
V
IL
Input Low Voltage
–0.3
0.8
V
V
IH
Input High Voltage
2.2
V
CC
+ 0.3
V
V
OL
Output Low Voltage
I
OL
= 2.1mA
0.4
V
Output Low Voltage (INT)
(1)
I
OL
= 0.5mA
0.4
V
V
OH
Output High Voltage
I
OH
= –1mA
2.4
V
Note:
1. The INT pin is Open Drain.
Table 5. DC Characteristics
(T
A
= 0 to 70
°
C; V
CC
= 4.75V to 5.5V or 4.5V to 5.5V)
Symbol
Parameter
Test Condition
Min
Max
Unit
C
IN
Input Capacitance
V
IN
= 0V
10
pF
C
IO (2)
Input / Output Capacitance
V
OUT
= 0V
10
pF
Notes:
1. Effective capacitance calculated from the equation C = I
t/
V with
V = 3V and power supply at 5V.
2. Outputs deselected
Table 4. Capacitance
(1)
(T
A
= 25
°
C)
Symbol
Parameter
Min
Typ
Max
Unit
V
PFD
Power-fail Deselect Voltage (M48Z09)
4.5
4.6
4.75
V
V
PFD
Power-fail Deselect Voltage (M48Z19)
4.2
4.3
4.5
V
V
SO
Battery Back-up Switchover Voltage
3.0
V
t
DR
Expected Data Retention Time
11
YEARS
Note:
1. All voltages referenced to V
SS
.
Table 6. Power Down/Up Trip Points DC Characteristics
(1)
(T
A
= 0 to 70
°
C)
4/13
M48Z09, M48Z19
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相關(guān)代理商/技術(shù)參數(shù) |
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| M48Z19PC | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:CMOS 8K x 8 ZEROPOWER SRAM |
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