- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359071 > M50FW002K (意法半導(dǎo)體) 2 Mbit 256Kb x8, Boot Block 3V Supply Firmware Hub Flash Memory PDF資料下載
參數(shù)資料
| 型號： | M50FW002K |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 2 Mbit 256Kb x8, Boot Block 3V Supply Firmware Hub Flash Memory |
| 中文描述： | 2兆位的256Kb × 8，啟動塊3V電源閃存固件集線器 |
| 文件頁數(shù)： | 4/39頁 |
| 文件大?。?/td> | 254K |
| 代理商： | M50FW002K |
第1頁第2頁第3頁當(dāng)前第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁
M50FW002
4/39
SUMMARY DESCRIPTION
The M50FW002 is a 2 Mbit (256Kb x8) non-vola-
tile memory that can be read, erased and repro-
grammed. These operations can be performed
using a single low voltage (3.0 to 3.6V) supply. For
fast programming and fast erasing in production
lines an optional 12V power supply can be used to
reduce the programming and the erasing times.
The memory is divided into blocks that can be
erased independently so it is possible to preserve
valid data while old data is erased. Blocks can be
protected individually to prevent accidental Pro-
gram or Erase commands from modifying the
memory. Program and Erase commands are writ-
ten to the Command Interface of the memory. An
on-chip Program/Erase Controller simplifies the
process of programming or erasing the memory by
taking care of all of the special operations that are
required to update the memory contents. The end
of a program or erase operation can be detected
and any error conditions identified. The command
set required to control the memory is consistent
with JEDEC standards.
The device features an asymmetrical blocked ar-
chitecture. The device has an array of 7 blocks:
I
1 Boot Block of 16 KByte
I
2 Parameter Blocks of 8 KByte each
I
1 Main Block of 32 KByte
I
3 Main Blocks of 64 KByte each
Two different bus interfaces are supported by the
memory. The primary interface, the Firmware Hub
(or FWH) Interface, uses Intel’s proprietary FWH
protocol. This has been designed to remove the
need for the ISA bus in current PC Chipsets; the
M50FW002 acts as the PC BIOS on the Low Pin
Count bus for these PC Chipsets.
The secondary interface, the Address/Address
Multiplexed (or A/A Mux) Interface, is designed to
be compatible with current Flash Programmers for
production line programming prior to fitting to a PC
Motherboard.
The memory is delivered with all the bits erased
(set to 1).
Figure 2. PLCC Connections
Note: Pins 27 and 28 are not internally connected.
AI05749
F
NC
VSS
VCC
INIT
FWH4
RFU
R
17
ID1
ID0
FWH0
F
F
F
R
FGPI1
FGPI0
WP
TBL
ID3
ID2
9
C
1
R
NC
F
RFU
32
V
V
M50FW002
F
IC (VIL)
R
25
V
A1
A0
DQ0
A7
A6
A5
A4
A3
A2
A
R
R
A
V
V
A
NC
VSS
VCC
G
W
RB
NC
DQ7
IC (VIH)
D
D
D
D
D
D
V
A/A Mux
A/A Mux
A/A Mux
A/A Mux
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M50FW002 | 2 Mbit 256Kb x8, Boot Block 3V Supply Firmware Hub Flash Memory |
| M50LPW041K1T | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW041N1T | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW041N | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW041K | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M50FW002K1 | 功能描述:閃存 3.6V 2M (256Kx8) RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| M50FW002K1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block 3V Supply Firmware Hub Flash Memory |
| M50FW002K5T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block 3V Supply Firmware Hub Flash Memory |
| M50FW016 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:16 Mbit 2Mb x8, Uniform Block 3V Supply Firmware Hub Flash Memory |
| M50FW016N | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:16 Mbit 2Mb x8, Uniform Block 3V Supply Firmware Hub Flash Memory |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。