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參數(shù)資料
| 型號： | M50FW002K |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 2 Mbit 256Kb x8, Boot Block 3V Supply Firmware Hub Flash Memory |
| 中文描述： | 2兆位的256Kb × 8，啟動塊3V電源閃存固件集線器 |
| 文件頁數(shù)： | 7/39頁 |
| 文件大?。?/td> | 254K |
| 代理商： | M50FW002K |
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M50FW002
dictable results may occur. Care should be taken
to avoid unpredictable behavior by changing WP
during Program or Erase Suspend.
Reserved for Future Use (RFU).
These pins do
not have assigned functions in this revision of the
part. They must be left disconnected.
Address/Address Multiplexed (A/A Mux)
Signal Descriptions
For the Address/Address Multiplexed (A/A Mux)
Interface see Figure 4, and Table 2.
Address Inputs (A0-A10).
The Address Inputs
are used to set the Row Address bits (A0-A10) and
the Column Address bits (A11-A17). They are
latched during any bus operation by the Row/Col-
umn Address Select input, RC.
Data Inputs/Outputs (DQ0-DQ7).
The Data In-
puts/Outputs hold the data that is written to or read
from the memory. They output the data stored at
the selected address during a Bus Read opera-
tion. During Bus Write operations they represent
the commands sent to the Command Interface of
the internal state machine. The Data Inputs/Out-
puts, DQ0-DQ7, are latched during a Bus Write
operation.
Output Enable (G).
The Output Enable, G, con-
trols the Bus Read operation of the memory.
Write Enable (W).
The Write Enable, W, controls
the Bus Write operation of the memory’s Com-
mand Interface.
Row/Column Address Select (RC).
The
Column Address Select input selects whether the
Address Inputs should be latched into the Row
Address bits (A0-A10) or the Column Address bits
(A11-A17). The Row Address bits are latched on
the falling edge of RC whereas the Column
Address bits are latched on the rising edge.
Ready/Busy Output (RB).
The Ready/Busy pin
gives the status of the memory’s Program/Erase
Controller. When Ready/Busy is Low, V
OL
, the
memory is busy with a Program or Erase operation
and it will not accept any additional Program or
Erase command except the Program/Erase
Suspend command. When Ready/Busy is High,
V
OH
, the memory is ready for any Read, Program
or Erase operation.
Supply Signal Descriptions
The Supply Signals are the same for both interfac-
es.
V
CC
Supply Voltage.
The V
CC
Supply Voltage
supplies the power for all operations (Read, Pro-
gram, Erase etc.).
Row/
The Command Interface is disabled when the V
CC
Supply Voltage is less than the Lockout Voltage,
V
LKO
. This prevents Bus Write operations from
accidentally damaging the data during power up,
power down and power surges. If the Program/
Erase Controller is programming or erasing during
this time then the operation aborts and the
memory contents being altered will be invalid.
After V
CC
becomes valid the Command Interface
is reset to Read mode.
A 0.1μF capacitor should be connected between
the V
CC
Supply Voltage pins and the V
SS
Ground
pin to decouple the current surges from the power
supply. Both V
CC
Supply Voltage pins must be
connected to the power supply. The PCB track
widths must be sufficient to carry the currents
required during program and erase operations.
V
PP
Optional Supply Voltage.
The V
PP
Optional
Supply Voltage pin is used to select the Fast
Program (see the Quadruple Byte Program
Command description) and Fast Erase options of
the memory and to protect the memory. When V
PP
< V
PPLK
Program and Erase operations cannot be
performed and an error is reported in the Status
Register if an attempt to change the memory
contents is made. When V
PP
= V
CC
Program and
Erase operations take place as normal. When V
PP
= V
PPH
Fast Program (if A/A Mux interface is
selected) and Fast Erase operations are used.
Any other voltage input to V
PP
will result in
undefined behavior and should not be used.
V
PP
should not be set to V
PPH
for more than 80
hours during the life of the memory.
V
SS
Ground.
V
SS
is the reference for all the volt-
age measurements.
Table 3. Block Addresses
Size
(Kbytes)
Address Range
Block
Number
Block Type
16
3C000h-3FFFFh
6
Boot Block
(Top)
8
3A000h-3BFFFh
5
Parameter
Block
8
38000h-39FFFh
4
Parameter
Block
32
30000h-37FFFh
3
Main Block
64
20000h-2FFFFh
2
Main Block
64
10000h-1FFFFh
1
Main Block
64
00000h-0FFFFh
0
Main Block
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M50FW002 | 2 Mbit 256Kb x8, Boot Block 3V Supply Firmware Hub Flash Memory |
| M50LPW041K1T | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW041N1T | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW041N | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW041K | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M50FW002K1 | 功能描述:閃存 3.6V 2M (256Kx8) RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| M50FW002K1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block 3V Supply Firmware Hub Flash Memory |
| M50FW002K5T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block 3V Supply Firmware Hub Flash Memory |
| M50FW016 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:16 Mbit 2Mb x8, Uniform Block 3V Supply Firmware Hub Flash Memory |
| M50FW016N | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:16 Mbit 2Mb x8, Uniform Block 3V Supply Firmware Hub Flash Memory |
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