參數(shù)資料
型號: M58LW128A150N1
廠商: STMICROELECTRONICS
元件分類: PROM
英文描述: 8M X 16 FLASH 3V PROM, 150 ns, PDSO56
封裝: 14 X 20 MM, PLASTIC, TSOP-56
文件頁數(shù): 14/65頁
文件大小: 378K
代理商: M58LW128A150N1
21/65
M58LW128A, M58LW128B
Table 5. Burst Configuration Register
Address
Bit
Mnemonic
Bit Name
Reset
Value
Description
Valid Bus
Width
17
M15
Read
Select
1
0
Synchronous Burst Read
x16 or x32
1
Asynchronous Bus Read
x16 or x32
16
to
13
M14-M11
X-Latency
XXXX
0010
X-Latency = 7, use only with Continuous Burst
Length
x16 or x32
0011
X-Latency = 8
x16 or x32
0100
X-Latency = 9
x16 or x32
0101
X-Latency = 10, use only with Continuous Burst
Length
x16 only
0110
X-Latency = 11, use only with Continuous Burst
Length
x16 only
1001
X-Latency = 12
x16 only
1010
X-Latency = 13
x16 only
1011
X-Latency = 13, use only with Continuous Burst
Length
x16 or x32
1101
X-Latency = 15
x16 or x32
Others
Reserved, Do Not Use.
11
M9
Y-Latency
X
0
When X-Latency < 13, Y-Latency = 1
When M14-M11 = 1011 or 1101, Y-Latency = 2
x16 or x32
1
When X-Latency
≤15 but M14-M11≠1011 or 1101,
Y-Latency = 2,
When M14-M11
=1011 or 1101 DO NOT USE.
x16 or x32
10
M8
Valid Data
Ready
X
0
R valid Low during valid Clock edge
x16 or x32
1
R valid Low one cycle before valid Clock edge
x16 or x32
9
M7
Burst Type
X
0
Interleaved
x16 or x32
1
Sequential
x16 or x32
8M6
Valid Clock
Edge
X
0
Falling Clock edge
x16 or x32
1
Rising Clock edge
x16 or x32
5M3
Latch
Enable
0
Random Read
x16 or x32
1
Latch Enable Controlled Read
x16 or x32
4
to
2
M2-M0
Burst
Length
XXX
100
1 Word or Double-Word
x16 or x32
101
2 Words or Double-Words
x16 or x32
001
4 Words or Double-Words
x16 or x32
010
8 Words
x16 only
111
Continuous
x16 or x32
Others
Reserved, Do Not Use.
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