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參數(shù)資料
| 型號： | M58LW64D |
| 廠商： | 意法半導體 |
| 英文描述： | 64 Mbit (8Mb x8, 4Mb x16, Uniform Block) 3V Supply Flash Memory |
| 中文描述： | 64兆位（和8Mb × 8，4Mb的x16插槽，統(tǒng)一座）3V電源快閃記憶體 |
| 文件頁數(shù)： | 21/50頁 |
| 文件大?。?/td> | 783K |
| 代理商： | M58LW64D |
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M58LW064D
■
If only the Program Status bit (SR4) is set
High, V
OH
,
then the Program/Erase Controller
has applied the maximum number of pulses to
the byte and still failed to verify that the Write
Buffer has programmed correctly or that the
Block is protected.
If the failure is due to a program or block
protect with V
PEN
low, V
OL
, then V
PEN
Status
bit (SR3) is also set High, V
OH
.
If the failure is due to a program on a protected
block then Block Protection Status bit (SR1) is
also set High, V
OH
.
If the failure is due to a program or erase
incorrect command sequence then Erase
Status bit (SR5) is also set High, V
OH
.
Once set High, the Program Status bit can only be
reset Low by a Clear Status Register command or
a hardware reset. If set High it should be reset be-
fore a new Program or Erase command is issued,
otherwise the new command will appear to fail.
V
PEN
Status Bit (SR3).
The V
PEN
Status bit can
be used to identify if a Program, Erase, Block Pro-
tection or Block Unprotection operation has been
attempted when V
PEN
is Low, V
IL
.
When the V
PEN
Status bit is Low, V
OL
, no Pro-
gram, Erase, Block Protection or Block Unprotec-
tion operations have been attempted with V
PEN
Low, V
IL
, since the last Clear Status Register com-
mand, or hardware reset. When the V
PEN
Status
bit is High, V
OH
, a Program, Erase, Block Protec-
tion or Block Unprotection operation has been at-
tempted with V
PEN
Low, V
IL
.
Once set High, the V
PEN
Status bit can only be re-
set by a Clear Status Register command or a hard-
ware reset. If set High it should be reset before a
new Program, Erase, Block Protection or Block
Unprotection command is issued, otherwise the
new command will appear to fail.
■
■
■
Program Suspend Status Bit (SR2).
The
gram Suspend Status bit indicates that a Program
operation has been suspended and is waiting to
be resumed. The Program Suspend Status should
only be considered valid when the Program/Erase
Controller Status bit is High (Program/Erase Con-
troller inactive); after a Program/Erase Suspend
command is issued the memory may still complete
the operation rather than entering the Suspend
mode.
When the Program Suspend Status bit is Low,
V
OL
, the Program/Erase Controller is active or has
completed its operation; when the bit is High, V
OH
,
a Program/Erase Suspend command has been is-
sued and the memory is waiting for a Program/
Erase Resume command.
When a Program/Erase Resume command is is-
sued the Program Suspend Status bit returns Low.
Block Protection Status Bit (SR1).
The
Protection Status bit can be used to identify if a
Program or Erase operation has tried to modify the
contents of a protected block.
When the Block Protection Status bit is Low, V
OL
,
no Program or Erase operations have been at-
tempted to protected blocks since the last Clear
Status Register command or hardware reset;
when the Block Protection Status bit is High, V
OH
,
a Program (Program Status bit SR4 set High) or
Erase (Erase Status bit SR5 set High) operation
has been attempted on a protected block.
Once set High, the Block Protection Status bit can
only be reset Low by a Clear Status Register com-
mand or a hardware reset. If set High it should be
reset before a new Program or Erase command is
issued, otherwise the new command will appear to
fail.
Reserved (SR0).
Bit SR0 of the Status Register
is reserved. Its value should be masked.
Pro-
Block
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