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參數(shù)資料
| 型號： | M66244FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | High Speed Monolithic Pulse Width Modulator |
| 中文描述： | 單片高速脈寬調(diào)制器 |
| 文件頁數(shù)： | 3/15頁 |
| 文件大?。?/td> | 78K |
| 代理商： | M66244FP |
FUNCTION
M66244 can control "H" width and positioning of PWM output by DATA pins (D<5:0> ) and
CONTROL pins (SEM/DEM,LEM/TEM) in each CLK period.
These inputs can be updated on the rising edge of the CLK.
Positioning the width-controlled pulse are begging , middle ,or end of the clock period.
This is accomplished through CONTROL pins (SEM/DEM,LEM/TEM)
Pulse positioning within the clock period is defined by the following CONTROL truth table.
SEM/DEM
1
1
0
LEM/TEM
1
0
X
Alignment
Right hand justify
Left hand justify
Center justify
High Speed Monolithic Pulse Width Modulator
The diagram of page4 illustrates the output of the M66244FP with various DATA(D<5:0>) ,
CONTROL(SEM/DEM, LEM/TEM) inputs and PWM output.
This does not take into account any delays,which will explain later.
The rising edge is delayed from the leading edge of the clock, and the falling edge is delayed
from the center of the clock period.
Top line shows the clock; the second shows DATA inputs ; third shows CONTROL inputs
being updated on the rising edge of clock. The forth line shows the resulting PWM pulse with an
explanation of the second and third lines.
In the first cycle (Ncycle) , DATA is 3F . So the CONTROL value is shown as "X". This
means the value is not important because a 100% pulse will be output for any CONTROL value.
In the second cycle (N+1cycle) , DATA is 1F , SEM/DEM is "H" and LEM/TEM is "H". This
means PWMoutput width is 50% and positioning is right hand justify.
In the third cycle (N+2cycle) , DATA is 0F , SEM/DEM is "L" and LEM/TEM is "X". This means
PWMoutput width is 25% and positioning is center justify.
In the fourth cycle (N+3cycle) , DATA is 2F , SEM/DEM is "H" and LEM/TEM is "L". This
means PWMoutput width is 75% and positioning is left hand justify.
In the fifth cycle (N+4cycle) , DATA is 00 . So the CONTROL value is shown "X" . This means
the value is not important because a 0% pulse will be output for any CONTROL value.
SEM/DEM : single edge modulation / dual edge modulation
LEM/TEM : leading edge modulation / trailing edge modulation
MITSUBISHI <DIGITAL ASSP>
M66244FP
(3/15)
C 1998 MITSUBISHI ELECTRIC CORPORATION
June 1998 Ver.8.0.0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M66250 | 5120 X 8-BIT LINE MEMORY(FIFO/LIFO) |
| M66250FP | 5120 X 8-BIT LINE MEMORY(FIFO/LIFO) |
| M66250P | 5120 X 8-BIT LINE MEMORY(FIFO/LIFO) |
| M66252FP | 1152 x 8-BIT LINE MEMORY FIFO |
| M66252P | 1152 x 8-BIT LINE MEMORY FIFO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M66250 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:5120 X 8-BIT LINE MEMORY(FIFO/LIFO) |
| M66250FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:5120*8-BIT LINE MEMORY(FIFO/LIFO) |
| M66250P | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:5120*8-BIT LINE MEMORY(FIFO/LIFO) |
| M66252FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:1152 x 8-BIT LINE MEMORY FIFO |
| M66252P | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:1152 x 8-BIT LINE MEMORY FIFO |
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