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參數(shù)資料
| 型號(hào)： | M66256 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 5120 x 8-BIT LINE MEMORY (FIFO) |
| 中文描述： | 5120 × 8位列內(nèi)存（先進(jìn)先出） |
| 文件頁數(shù)： | 6/11頁 |
| 文件大?。?/td> | 148K |
| 代理商： | M66256 |
6
MITSUBISHI
DIGITAL ASSP
M66256FP
5120
×
8-BIT LINE MEMORY (FIFO)
t
DS
t
DH
t
DS
t
DH
(n)
(n)
n cycle
n+1 cycle
n cycle
Disable cycle
WCK
WE
D
n
t
WCK
Period for writing data (n)
into memory
t
NWES
Period for writing data (n)
into memory
WRES = “H”
Matters that needs attention when WCK stops
Input data of n cycle is read at the rising edge after WCK of n cycle and writing operation starts in the WCK low-level period of
n+1 cycle. The writing operation is complete at the falling edge after n+1 cycle.
To stop reading write data at n cycle, enter WCK before the rising edge after n+1 cycle.
When the cycle next to n cycle is a disable cycle, WCK for a cycle requires to be entered after the disable cycle as well.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M66256FP | 5120 x 8-BIT LINE MEMORY (FIFO) |
| M66257 | 5120 x 8-BIT x 2 LINE MEMORY (FIFO) |
| M66257FP | 5120 x 8-BIT x 2 LINE MEMORY (FIFO) |
| M66258 | 8192 x 8-BIT LINE MEMORY |
| M66258FP | 8192 x 8-BIT LINE MEMORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M66256FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:5120 × 8-Bit Line Memory (FIFO) |
| M66256FP(#TF0T) | 制造商:Renesas Electronics Corporation 功能描述: |
| M66257 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:5120 x 8-BIT x 2 LINE MEMORY (FIFO) |
| M66257FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:5120 x 8-BIT x 2 LINE MEMORY (FIFO) |
| M66258 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:8192 x 8-BIT LINE MEMORY |
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