參數(shù)資料
型號： M66290AGP
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP48
封裝： LQFP-48
文件頁數(shù)： 7/53頁
文件大?。?/td> 435K
代理商： M66290AGP
USB DEVICE CONTROLLER
M66290AGP/FP
MITSUBISHI <DIGITAL ASSP>
15
Reset
Function
Name
Bit
The factor is different by the direction of the transfer of each endpoint.
In each endpoint, this bit changes to "1" when the transmission of all
stored data is completed (direction:IN) and when received the packet
which is exceeded to maximum packet size (direction:OUT).
The endpoint which occurs the interrupt can be checked to see the
EPB_EMP_OVR[5:0].
This flag is cleared to clear the status flag of EPB_EMP_OVR[5:0].
-
0
R
-
0
W/R
1
0
W/R
-
0
W/R
-
0
W/R
Endpoint5-0 buffer
empty/size error
interrupt
BEMP
10
This bit changes to "1" when the stage of control transfer is shifted.
There are five factors, that is, setup stage end, control write transfer
status stage shift, control read transfer status stage shift, control transfer
end, and control transfer sequence error.
Four factors, except for setup stage end, can be masked by the
corresponded bit of the "Interrupt Enable Register0".
If "0" is written, status flag is cleared.
If "1" is written, flag is not changed.
Control transfer
stage transition
interrupt
This bit changes to "1" when device state shifted.
There are four factors, that is, USB reset detect, suspend detect,
"Set Address" execution, and "Set Configuration" execution.
These four factors can be masked by the corresponded bit of
"Interrupt Enable Register0" .
If "0" is written, status flag is cleared.
If "1" is written, flag is not changed.
Device state
transition interrupt
This bit changes to "1" when detected SOF.
If "0" is written, status flag is cleared.
If "1" is written, flag is not changed.
SOF detect
interrupt
This bit changes to "1" when USB bus state changed("J" to "K" or "SE0")
under the condition that resume interrupt enable flag is set.
This bit is set even if the internal clock (sck) is in halt state.
If "0" is written after enabled internal clock as operation, status flag is
cleared. But if internal clock is in halt state, flag is not cleared.
If "1" is written, flag is not changed.
Resume detect
interrupt
This bit changes to "1" when Vbus input changed both "0" to "1" and
"1" to "0".
As to the Vbus input state, confirm to see the bit of Vbus input port.
This bit is set even if the internal clock (sck) is in halt state.
If "0" is written after enabled internal clock as operation, status flag is
cleared. But if internal clock is in halt state, flag is not cleared.
If "1" is written, flag is not changed.
Vbus interrupt
SOFR
11
12
13
14
CTRT
DVST
RESM
-
0
W/R
VBUS
15
Bit
Name
W/R
USB
S/W
H/W
BEMP
INTN
VALID
DVSQ[2:0]
CTSQ[2:0]
CTRT
Vbus
INTR
DVST
SOFR
RESM
VBUS
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D15
D13
D14
(2-5) Interrupt Status Register 0 (Address : 18h)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M66291GP 制造商:Renesas Electronics Corporation 功能描述:
M66291GP#201 制造商:Renesas Electronics Corporation 功能描述:IC ASSP USB2.0 DEVICE CONTROLLER 48LQFP
M66291GP#RB0S 功能描述:IC USB CONTROLLER GEN-PUR 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
M66291GPRB0S 制造商:Renesas Electronics Corporation 功能描述:USB2.0 Device Controller,LQFP48
M66291HP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:ASSP (USB2.0 Device Controller)
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