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參數(shù)資料
| 型號： | M66335FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | FACSIMILE IMAGE DATA PROCESSOR |
| 中文描述： | 傳真寄發(fā)圖像數(shù)據(jù)處理器 |
| 文件頁數(shù)： | 22/57頁 |
| 文件大?。?/td> | 656K |
| 代理商： | M66335FP |
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MITSUBISHI
DIGITAL ASSP
M66335FP
FACSIMILE IMAGE DATA PROCESSOR
22
(5) DMA interface (multivalued output)
The DMA transfer of data after non-uniformity correction can be per-
formed by setting P_O) of the register 01: at “1” (existence of DMA
SSCAN
DRQ
(DMA counter
reset signal)
(DMA
counter signal)
DAKB
RDB
(DMAFIN)
INT
D<7 : 2>
1
2
3
4
5
6
(XXXX): internal signal
1
On completion of reading one line, with a
↓
flow of SSCAN, the reset signal is entered in the DMA counter.
2
With a
↑
flow of the reset signal, DRQ shifts to ‘H’, when the DMA transfer becomes ready.
3
With DAKB at ‘L’ and a
↓
flow of RDB, DRQ shifts to ‘L’, when multivalued data are output to D <7 : 2> during the period that RDB is at ‘L’.
4
With a
↑
flow of DAKB, the DMA counter counts up and DRQ shifts to ‘H’, when the DMA transfer becomes ready again.
5
The cycle of the above
3
and
4
is repeated until the DMA counter counts up to reach the number of output pixels set in the registers 13 and
14 OUTLENGTH subtracted by one. By that repetitive operation, DMAFIN shifts to ‘H’ to terminate the DMA transfer when it reaches the set
number.
6
With a
↓
flow of DMAFIN, INT shifts to ‘H’, when CPU has an interrupt.
7
Reading is resumed from the next line by negating the INT signal through the register 17 (INTCLR).
output) and M_B of that register at “1” (multivalue). With this setting,
neither enlargement, nor reduction, nor 400 dpi of resolution can
be set.
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