參數(shù)資料
型號(hào)： M68HC11D3CFB1
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 1 MHz, MICROCONTROLLER, PQFP44
封裝： QFP-44
文件頁數(shù)： 52/124頁
文件大小： 5398K
代理商： M68HC11D3CFB1
CENTRAL PROCESSING UNIT
TECHNICAL DATA
3-13
SBCA (opr)
Subtract with
Carry from A
A – M – C
A
A
IMM
ADIR
A
EXT
AIND,X
AIND,Y
82
92
B2
A2
18
A2
ii
dd
hh ll
ff
2
3
4
5
————
SBCB (opr)
Subtract with
Carry from B
B – M – C
B
B
IMM
BDIR
B
EXT
BIND,X
BIND,Y
C2
D2
F2
E2
18
E2
ii
dd
hh ll
ff
2
3
4
5
————
SEC
Set Carry
1
C
INH
0D
—
2
———————
1
SEI
Set Interrupt
Mask
1
I
INH
0F
—
2
———
1
————
SEV
Set Overflow
Flag
1
V
INH
0B
—
2
——————
1
—
STAA (opr)
Store
Accumulator
A
MA
DIR
A
EXT
AIND,X
AIND,Y
97
B7
A7
18
A7
dd
hh ll
ff
3
4
5
————
0—
STAB (opr)
Store
Accumulator
B
MB
DIR
B
EXT
BIND,X
BIND,Y
D7
F7
E7
18
E7
dd
hh ll
ff
3
4
5
————
0—
STD (opr)
Store
Accumulator
D
A
M, B M + 1
DIR
EXT
IND,X
IND,Y
DD
FD
ED
18
ED
dd
hh ll
ff
4
5
6
————
0—
STOP
Stop Internal
Clocks
—
INH
CF
—
2
————————
STS (opr)
Store Stack
Pointer
SP
M : M + 1
DIR
EXT
IND,X
IND,Y
9F
BF
AF
18
AF
dd
hh ll
ff
4
5
6
————
0—
STX (opr)
Store Index
Register X
IX
M : M + 1
DIR
EXT
IND,X
IND,Y
DF
FF
EF
CD
EF
dd
hh ll
ff
4
5
6
————
0—
STY (opr)
Store Index
Register Y
IY
M : M + 1
DIR
EXT
IND,X
IND,Y
18
DF
18
FF
1A
EF
18
EF
dd
hh ll
ff
5
6
————
0—
SUBA (opr)
Subtract
Memory from
A
A – M
A
A
IMM
ADIR
A
EXT
AIND,X
AIND,Y
80
90
B0
A0
18
A0
ii
dd
hh ll
ff
2
3
4
5
————
SUBB (opr)
Subtract
Memory from
B
B – M
B
A
IMM
ADIR
A
EXT
AIND,X
AIND,Y
C0
D0
F0
E0
18
E0
ii
dd
hh ll
ff
2
3
4
5
————
SUBD (opr)
Subtract
Memory from
D
D – M : M + 1
DIMM
DIR
EXT
IND,X
IND,Y
83
93
B3
A3
18
A3
jj kk
dd
hh ll
ff
4
5
6
7
————
SWI
Software
Interrupt
See Figure 3–2
INH
3F
—
14
———
1
————
TAB
Transfer A to B
A
B
INH
16
—
2
————
0—
TAP
Transfer A to
CC Register
A
CCR
INH
06
—
2
↓
TBA
Transfer B to A
B
A
INH
17
—
2
————
0—
TEST
TEST (Only in
Test Modes)
Address Bus Counts
INH
00
—
*
————————
TPA
Transfer CC
Register to A
CCR
A
INH
07
—
2
————————
TST (opr)
Test for Zero
or Minus
M – 0
EXT
IND,X
IND,Y
7D
6D
18
6D
hh ll
ff
6
7
————
00
TSTA
Test A for Zero
or Minus
A – 0
A
INH
4D
—
2
————
00
TSTB
Test B for Zero
or Minus
B – 0
B
INH
5D
—
2
————
00
Table 3-2 Instruction Set (Sheet 6 of 7)
Mnemonic
Operation
Description
Addressing
Instruction
Condition Codes
Mode
Opcode
Operand
Cycles
S
X
H
I
N
Z
V
C
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.
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