參數(shù)資料
型號: M95160-R
廠商: 意法半導(dǎo)體
元件分類: DRAM
英文描述: 16 Kbit and 8 Kbit serial SPI bus EEPROM with high speed clock
中文描述: 16千位和8千位串行SPI高速時鐘總線的EEPROM
文件頁數(shù): 32/45頁
文件大小: 270K
代理商: M95160-R
DC and AC parameters
M95160, M95080
32/45
Table 20.
AC characteristics (M95160 and
M95080
, device grade 6)
Test conditions specified in
Table 12.
and
Table 9.
Symbol
Alt.
Parameter
Min.
Max.
Unit
f
C
f
SCK
Clock frequency
D.C.
10
MHz
t
SLCH
t
CSS1
S active setup time
15
ns
t
SHCH
t
CSS2
S not active setup time
15
ns
t
SHSL
t
CS
S deselect time
40
ns
t
CHSH
t
CSH
S active hold time
25
ns
t
CHSL
t
CH(1)
t
CL (1)
t
CLCH(2)
t
CHCL(2)
S not active hold time
15
ns
1.
t
CH
+ t
CL
must never be lower than the shortest possible clock period, 1/f
C
(max).
Value guaranteed by characterization, not 100% tested in production.
t
CLH
Clock high time
40
ns
t
CLL
Clock low time
40
ns
2.
t
RC
Clock rise time
1
μs
t
FC
Clock fall time
1
μs
t
DVCH
t
DSU
Data in setup time
15
ns
t
CHDX
t
DH
Data in hold time
15
ns
t
HHCH
Clock low hold time after HOLD not active
15
ns
t
HLCH
Clock low hold time after HOLD active
20
ns
t
CLHL
Clock low set-up time before HOLD active
0
ns
t
CLHH
t
SHQZ(2)
Clock low set-up time before HOLD not active
0
ns
t
DIS
Output disable time
25
ns
t
CLQV
t
V
Clock low to output valid
35
ns
t
CLQX
t
QLQH(2)
t
QHQL(2)
t
HO
Output hold time
0
ns
t
RO
Output rise time
20
ns
t
FO
Output Fall Time
20
ns
t
HHQV
t
HLQZ ((2))
t
LZ
HOLD High to Output Valid
25
ns
t
HZ
HOLD Low to Output High-Z
35
ns
t
W
t
WC
Write Time
5
ms
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