參數(shù)資料
型號(hào): MACH131SP-15YC
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: High-Performance EE CMOS Programmable Logic
中文描述: EE PLD, 15 ns, PQFP100
封裝: PLASTIC, QFP-100
文件頁(yè)數(shù): 13/47頁(yè)
文件大小: 1200K
代理商: MACH131SP-15YC
20
MACH 1 & 2 Families
BLOCK DIAGRAM (MACH131, MACH131SP)
I/O Cells
Macrocells
I/O48 – I/O63
52 x 70
AND Logic Array
and
Logic Allocator
OE
I/O Cells
Macrocells
I/O16 – I/O31
52 x 70
AND Logic Array
and
Logic Allocator
OE
16
26
Switch Matrix
I/O Cells
Macrocells
I/O0 – I/O15
I2, I5
52 x 70
AND Logic Array
and
Logic Allocator
CLK0/I0, CLK1/I1
CLK2/I3, CLK3/I4
OE
16
26
2
4
16
26
I/O Cells
Macrocells
I/O32 – I/O47
52 x 70
AND Logic Array
and
Logic Allocator
OE
16
26
4
Block A
Block B
Block D
Block C
14051K-009
16
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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