參數(shù)資料
型號(hào): MACH131SP-15YC
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: High-Performance EE CMOS Programmable Logic
中文描述: EE PLD, 15 ns, PQFP100
封裝: PLASTIC, QFP-100
文件頁(yè)數(shù): 30/47頁(yè)
文件大?。?/td> 1200K
代理商: MACH131SP-15YC
36
MACH 1 & 2 Families
44-PIN TQFP CONNECTION DIAGRAM (MACH111-5/7/10/12/15 AND
MACH111SP-5/7/10/12/15)
Top View
44-Pin TQFP
PIN DESIGNATIONS
CLK/I = Clock or Input
GND = Ground
I
= Input
I/O
= Input/Output
VCC
= Supply Voltage
TDI
= Test Data In
TCK
= Test Clock
TMS
= Test Mode Select
TDO = Test Data Out
Note:
1. Pin designators in parentheses ( ) apply to the MACH111SP
I/O12
I/O13
I/O14
I/O15
VCC
GND
I/O16
I/O17
I/O18
I/O19
I/O20
I/O4
I/O3
I/O2
I/O1
I/O0
GND
VCC
I/O31
I/O30
I/O29
I/O28
I/O27
I/O26
I/O25
I/O24
CLK3/I5 (TDO)
GND
CLK2/I4 (CLK 1/I1)
I3 (TMS)
I/O23
I/O22
I/O21
I/O5
I/O6
I/O7
(TDI) I0
(CLK 0/I0) CLK0/I1
GND
(TCK) CLK1/I2
I/O8
I/O9
I/O10
I/O11
1
2
3
4
5
6
7
8
9
10
11
33
32
31
30
29
28
27
26
25
24
23
44
43
42
41
40
39
38
37
36
35
34
12
13
14
15
16
17
18
19
20
21
22
Block B
Block A
14051K-019
相關(guān)PDF資料
PDF描述
MACH131SP-5YC High-Performance EE CMOS Programmable Logic
MACH131SP-7YC High-Performance EE CMOS Programmable Logic
MACH1 High-Performance EE CMOS Programmable Logic
MACH210A-10JC High-Density EE CMOS Programmable Logic
MACH210A-10VC High-Density EE CMOS Programmable Logic
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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