參數(shù)資料
型號(hào)： MACH131SP-15YC
廠商： LATTICE SEMICONDUCTOR CORP
元件分類(lèi)： PLD
英文描述： High-Performance EE CMOS Programmable Logic
中文描述： EE PLD, 15 ns, PQFP100
封裝： PLASTIC, QFP-100
文件頁(yè)數(shù)： 18/47頁(yè)
文件大小： 1200K
代理商： MACH131SP-15YC
MACH 1 & 2 Families
25
MACH111 AND MACH111SP
SWITCHING CHARACTERISTICS OVER OPERATING RANGES1
Notes:
1. See “Switching Test Circuit” in the General Information Section of the Vantis 1999 Data Book.
2. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modied where this parameter may be affected.
3. If a signal is powered-down, this parameter must be added to its respective high-speed parameter.
Parameter
Symbol
Parameter Description
-5
-7
-10
-12
-14
-15
-18
Unit
Min Max Min Max Min Max Min Max Min Max Min Max Min Max
tPD
Input, I/O, or Feedback to Combinatorial Output
5
7.5
10
12
14
15
18
ns
tS
Setup Time from Input, I/O, or Feedback
to Clock
D-type
3.5
5.5
6.5
7
8.5
10
12
ns
T-type
4
6.5
7.5
8
10
11
13.5
ns
tH
Register Data Hold Time
0000000
ns
tCO
Clock to Output
3.5
5
6
8
10
12
ns
tWL
Clock Width
LOW
2.5
35666
7.5
ns
tWH
HIGH
2.5
35666
7.5
ns
fMAX
Maximum
Frequency
External
Feedback
1/(tS + tCO)
D-type
143
95
80
66.7
54
50
42
MHz
T-type
133
87
74
62.5
50
47.6
39
MHz
Internal Feedback (fCNT)
D-type
182
133
100
76.9
69
66.6
53
MHz
T-type
167
125
91
71.4
57
55.5
44
MHz
No Feedback 1/(tWL + tWH)
200
167
100
83.3
66.7
MHz
tAR
Asynchronous Reset to Registered Output
7.5
9.5
11
16
19.5
20
24
ns
tARW
Asynchronous Reset Width (Note 2)
4.5
5
7.5
12
14.5
15
18
ns
tARR
Asynchronous Reset Recovery Time (Note 2)
4.5
5
7.5
8
10
12
ns
tAP
Asynchronous Preset to Registered Output
7.5
9.5
11
16
19.5
20
24
ns
tAPW
Asynchronous Preset Width (Note 2)
4.5
5
7.5
12
14.5
15
18
ns
tAPR
Asynchronous Preset Recovery Time (Note 2)
4.5
5
7.5
8
10
12
ns
tEA
Input, I/O, or Feedback to Output Enable
7.5
9.5
10
12
14.5
15
18
ns
tER
Input, I/O, or Feedback to Output Disable
7.5
9.5
10
12
14.5
15
18
ns
tLP
tPD Increase for Powered-down Macrocell (Note 3)
10
ns
tLPS
tS Increase for Powered-down Macrocell (Note 3)
7777777
ns
tLPCO
tCO Increase for Powered-down Macrocell (Note 3)
3333333
ns
tLPEA
tEA Increase for Powered-down Macrocell (Note 3)
10
ns
相關(guān)PDF資料
PDF描述
MACH131SP-5YC High-Performance EE CMOS Programmable Logic
MACH131SP-7YC High-Performance EE CMOS Programmable Logic
MACH1 High-Performance EE CMOS Programmable Logic
MACH210A-10JC High-Density EE CMOS Programmable Logic
MACH210A-10VC High-Density EE CMOS Programmable Logic
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MACH131SP-18YI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 HI PERF EE CMOS PLD RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類(lèi)型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
MACH131SP-5VC 制造商:LATTICE 制造商全稱(chēng):Lattice Semiconductor 功能描述:High-Performance EE CMOS Programmable Logic
MACH131SP-5YC 制造商:LATTICE 制造商全稱(chēng):Lattice Semiconductor 功能描述:High-Performance EE CMOS Programmable Logic
MACH131SP-7VC 制造商:Rochester Electronics LLC 功能描述:- Bulk
MACH131SP-7YC 制造商:LATTICE 制造商全稱(chēng):Lattice Semiconductor 功能描述:High-Performance EE CMOS Programmable Logic
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*