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參數(shù)資料
| 型號(hào)： | MB86836PMT2 |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-bit Embedded Controller |
| 中文描述： | 32-BIT, 90 MHz, RISC MICROCONTROLLER, PQFP144 |
| 封裝： | 20 X 20 MM, PLASTIC, LQFP-144 |
| 文件頁數(shù)： | 72/82頁 |
| 文件大?。?/td> | 1373K |
| 代理商： | MB86836PMT2 |
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MB86830 Series
72
18. DSU (Debugging support unit )(MB86832/834)
(1)Instruction Address Descriptor Register (INSTADR)
ASI
=
0x01, Address
=
0x0000ff00
H
to 0x0000ff04
H
bit 31 to bit 2
bit 1 to bit 0
:Instruction Address Compare Data (RST
=
0x00000000
H
)
:Reserved [“0”Write, Don’t care for read]
(2)Data Address Descriptor Register (DATAADR)
ASI
=
0x01, Address
=
0x0000ff08
H
to 0x0000ff0c
H
bit 31 to bit 0
:Data Address Compare Data (RST
=
0x00000000
H
)
(3)Data Value Descriptor Register (DVDR)
ASI
=
0x01, Address
=
0x0000ff10
H
bit 31 to bit 0
:Data Value (RST
=
0x00000000
H
)
(4)Data Value Descriptor Register/Mask Register (DVDMSK)
ASI
=
0x01, Address
=
0x0000ff14
H
bit 31 to bit 0
:Data/Mask Value (RST
=
0x00000000
H
)
(5)Debug Control Register (DSUCR)
ASI
=
0x01, Address
=
0x0000ff18
H
bit 31 to bit 24 :ASI Value2 (RST
=
0x00)
bit 23 to bit 16 :ASI Value1 (RST
=
0x00)
bit 15
:Instruction User/Supervrisor2 (Supervrisor
=
1, User
=
0, RST
=
0)
bit 14
:Instruction User/Supervrisor1 (Supervrisor
=
1, User
=
0, RST
=
0)
bit 13 to bit 9
:Reserved
bit 8
:Enable Data Address2 Break (Enable
=
1, Disable
=
0, RST
=
0)
bit 7
:Enable Data Address1 Break (Enable
=
1, Disable
=
0, RST
=
0)
bit 6
:Enable Instruction Address2 Break (Enable
=
1, Disable
=
0, RST
=
0)
bit 5
:Enable Instruction Address1 Break (Enable
=
1, Disable
=
0, RST
=
0)
bit 4
:Single Step (On
=
1, Off
=
0, RST
=
0)
bit 3 to bit 2
:Data Value Transaction Type (RST
=
0x0)
bit
→
31
2
1
0
Instruction Address Compare Data
Reserved
bit
→
31
0
Data Address Compare Data
bit
→
31
0
Data Value
bit
→
31
0
Data/Mask Value
bit
→
31
24
23
16
15
14
1
3
9
8
7
6
5
4
3
2
1
0
ASI Value2
ASI Value1
Reserved
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|---|---|
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