參數(shù)資料
型號(hào)： MB90F897S
廠商： Fujitsu Limited
英文描述： 10-Bit Buffers/Drivers With 3-State Outputs 28-LCCC -55 to 125
中文描述： 16位微控制器專有
文件頁數(shù)： 15/78頁
文件大?。?/td> 746K
代理商： MB90F897S
MB90895 Series
15
(Continued)
Address
Register
abbreviation
Register
Read/
Write
Resource
Initial value
00002C
H
to
00002F
H
(Reserved area) *
000030
H
ENIR
DTP/External interrupt permission
register
R/W
DTP/External
interrupt
00000000
B
000031
H
EIRR
DTP/External interrupt permission
register
R/W
XXXXXXXX
B
000032
H
ELVR
Detection level setting register
R/W
00000000
B
000033
H
R/W
00000000
B
000034
H
ADCS
A/D control status register
R/W
8/10-bit
A/D converter
00000000
B
000035
H
R/W, W
00000000
B
000036
H
ADCR
A/D data register
W, R
XXXXXXXX
B
000037
H
R
00101XXX
B
000038
H
to
00003E
H
(Reserved area) *
00003F
H
PSCCR
Sub-clock control register
R/W, W
Clock
XXXX0000
B
000040
H
PPGC0
PPG0 operation mode control
register
R/W, W
8/16-bit
PPG timer 0/1
0X000XX1
B
000041
H
PPGC1
PPG1 operation mode control
register
R/W, W
0X000001
B
000042
H
PPG01
PPG0/1 count clock selection
register
R/W
000000XX
B
000043
H
(Reserved area) *
000044
H
PPGC2
PPG2 operation mode control
register
R/W, W
8/16-bit
PPG timer 2/3
0X000XX1
B
000045
H
PPGC3
PPG3 operation mode control
register
R/W, W
0X000001
B
000046
H
PPG23
PPG2/3 count clock selection
register
R/W
000000XX
B
000047
H
to
00004F
H
(Reserved area) *
相關(guān)PDF資料
PDF描述
MB90F897SPMT 10-Bit Buffers/Drivers With 3-State Outputs 24-CDIP -55 to 125
MB90M405 Octal Edge-Triggered D-type Flip-Flops With Clear 20-CFP -55 to 125
MB90M407 Octal Edge-Triggered D-type Flip-Flops With Clear 20-LCCC -55 to 125
MB90M408 Octal Edge-Triggered D-type Flip-Flops With Clear 20-CDIP -55 to 125
MB90MV405 F2MC-16LX FAMILY 16-BIT MICROCONTROLLERS HARDWARE MANUAL ABSTRACTS
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參數(shù)描述
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