參數(shù)資料
型號： MB90F897S
廠商： Fujitsu Limited
英文描述： 10-Bit Buffers/Drivers With 3-State Outputs 28-LCCC -55 to 125
中文描述： 16位微控制器專有
文件頁數(shù)： 17/78頁
文件大?。?/td> 746K
代理商： MB90F897S
MB90895 Series
17
(Continued)
Address
Register
abbreviation
Register
Read/
Write
Resource
Initial value
000087
H
(Reserved area) *
000088
H
RCR
Receive completion register
R/W
CAN controller
00000000
B
000089
H
(Reserved area) *
00008A
H
RRTRR
Receive RTR register
R/W
CAN controller
00000000
B
00008B
H
(Reserved area) *
00008C
H
ROVRR
Receive overrun register
R/W
CAN controller
00000000
B
00008D
H
(Reserved area) *
00008E
H
RIER
Receive completion interrupt
permission register
R/W
CAN controller
00000000
B
00008F
H
to
00009D
H
(Reserved area) *
00009E
H
PACSR
Address detection control register
R/W
Address matching
detection function
00000000
B
00009F
H
DIRR
Delay interrupt request generation/
release register
R/W
Delay interrupt
generation module
XXXXXXX0
B
0000A0
H
LPMCR
Lower power consumption mode
control register
W,R/W
Lower power
consumption mode
00011000
B
0000A1
H
CKSCR
Clock selection register
R,R/W
Clock
11111100
B
0000A2
H
PILR
Port input level selection register
R/W
I/O
0000000X
B
0000A3
H
to
0000A7
H
(Reserved area) *
0000A8
H
WDTC
Watchdog timer control register
R,W
Watchdog timer
XXXXX111
B
0000A9
H
TBTC
Time-base timer control register
R/W,W
Time-base timer
1XX00100
B
0000AA
H
WTC
Clock timer control register
R,R/W
Clock timer
1X001000
B
0000AB
H
to
0000AD
H
(Reserved area) *
0000AE
H
FMCS
Flash memory control status
register
R,W,R/W
512K-bit flash
memory
000X0000
B
0000AF
H
(Reserved area) *
相關(guān)PDF資料
PDF描述
MB90F897SPMT 10-Bit Buffers/Drivers With 3-State Outputs 24-CDIP -55 to 125
MB90M405 Octal Edge-Triggered D-type Flip-Flops With Clear 20-CFP -55 to 125
MB90M407 Octal Edge-Triggered D-type Flip-Flops With Clear 20-LCCC -55 to 125
MB90M408 Octal Edge-Triggered D-type Flip-Flops With Clear 20-CDIP -55 to 125
MB90MV405 F2MC-16LX FAMILY 16-BIT MICROCONTROLLERS HARDWARE MANUAL ABSTRACTS
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