參數(shù)資料
型號(hào)： MB90F897SPMT
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 10-Bit Buffers/Drivers With 3-State Outputs 24-CDIP -55 to 125
中文描述： 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP48
封裝： 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù)： 18/78頁
文件大?。?/td> 746K
代理商： MB90F897SPMT
MB90895 Series
18
(Continued)
Address
Register
abbreviation
Register
Read/
Write
Resource
Initial value
0000B0
H
0000B1
H
0000B2
H
0000B3
H
0000B4
H
0000B5
H
0000B6
H
0000B7
H
0000B8
H
0000B9
H
0000BA
H
0000BB
H
0000BC
H
0000BD
H
0000BE
H
0000BF
H
0000C0
H
to
0000FF
H
ICR00
ICR01
ICR02
ICR03
ICR04
ICR05
ICR06
ICR07
ICR08
ICR09
ICR10
ICR11
ICR12
ICR13
ICR14
ICR15
Interrupt control register 00
Interrupt control register 01
Interrupt control register 02
Interrupt control register 03
Interrupt control register 04
Interrupt control register 05
Interrupt control register 06
Interrupt control register 07
Interrupt control register 08
Interrupt control register 09
Interrupt control register 10
Interrupt control register 11
Interrupt control register 12
Interrupt control register 13
Interrupt control register 14
Interrupt control register 15
R/W
Interrupt controller
00000111
B
00000111
B
00000111
B
00000111
B
00000111
B
00000111
B
00000111
B
00000111
B
00000111
B
00000111
B
00000111
B
00000111
B
00000111
B
00000111
B
00000111
B
00000111
B
(Reserved area) *
001FF0
H
PADR0
Detection address setting register 0
(low-order)
Detection address setting register 0
(middle-order)
Detection address setting register 0
(high-order)
Detection address setting register 1
(low-order)
Detection address setting register 1
(middle-order)
Detection address setting register 1
(high-order)
R/W
Address matching
detection function
XXXXXXXX
B
001FF1
H
XXXXXXXX
B
001FF2
H
XXXXXXXX
B
001FF3
H
PADR1
R/W
XXXXXXXX
B
001FF4
H
XXXXXXXX
B
001FF5
H
XXXXXXXX
B
003900
H
003901
H
003902
H
003903
H
003904
H
to
003909
H
TMR0/
TMRLR0
16-bit timer register 0/16-bit reload
register
R,W
16-bit reload timer 0
XXXXXXXX
B
XXXXXXXX
B
XXXXXXXX
B
XXXXXXXX
B
TMR1/
TMRLR1
16-bit timer register 1/16-bit reload
register
R,W
16-bit reload timer 1
(Reserved area) *
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