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參數(shù)資料
| 型號： | MB91101APF |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 50 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數(shù)： | 2/99頁 |
| 文件大?。?/td> | 935K |
| 代理商： | MB91101APF |
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MB91101/MB91101A
10
*1: FPT-100P-M05
*2: FPT-100P-M06
(Continued)
Pin no.
Pin name
Circuit
type
Description
LQFP*1
QFP*2
77
80
SO0
F
UART0 data output pin
This function is available when UART0 data output is enabled.
TRG1
PWM timer external trigger input pin
This function is available when serial data output of PF1, UART0
are disabled.
PF1
Can be configured as the I/O port when SO0 and TRG1 are not
used.
This function is available when serial data output of UART0 is dis-
abled.
78
81
SC0
F
UART0 clock I/O pin
Clock output is available when UART0 clock output is enabled.
OCPA3
PWM timer output pin
This function is available when PWM timer output is enabled.
PF2
Can be configured as the I/O port when SC0 and OCPA3 are not
used.
This function is available when UART0 clock output is disabled.
79
82
SI1
F
UART1 data input pin
This pin is used for input during UART1 is in input operation, and it
is necessary to disable output for other functions from this pin un-
less such output is made intentionally.
TRG2
PWM timer external trigger input pin
This pin is used for input during PWM timer external trigger is in in-
put operation, and it is necessary to disable output for other func-
tions from this pin unless such output is made intentionally.
PF3
Can be configured as the I/O port when SI1 and TRG2 are not used.
80
83
SO1
F
UART1 data output pin
This function is available when UART1 data output is enabled.
TRG3
PWM timer external trigger input pin
This function is available when PF4, UART1 data outputs are dis-
abled.
PF4
Can be configured as the I/O port when SO1 and TRG3 are not
used.
This function is available when UART1 data output is disabled.
81
84
SI2
F
UART2 data input pin
This pin is used for input during UART2 is in input operation, and it
is necessary to disable output for other functions from this pin un-
less such output is made intentionally.
OCPA1
PWM timer output pin
This function is available when PWM timer output is enabled.
PF5
Can be configured as the I/O port when SI2 and OCPA1 are not
used.
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PDF描述 |
|---|---|
| MB91101PF-G-BND-R | 32-BIT, 50 MHz, RISC MICROCONTROLLER, PQFP100 |
| MB91103 | 32-BIT, 25 MHz, RISC MICROCONTROLLER, PQFP160 |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MB91101APFR-G-JNE1 | 制造商:FUJITSU 功能描述: |
| MB91101APFV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
| MB91106 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
| MB91106PF | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
| MB91106PFV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
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