參數(shù)資料
型號: MB91302APFF-G-XXX-BNDE1
元件分類: 微控制器/微處理器
英文描述: 32-BIT, MROM, 68 MHz, RISC MICROCONTROLLER, PQFP144
封裝: 0.40 MM PITCH, PLASTIC, LQFP-144
文件頁數(shù): 69/140頁
文件大小: 2841K
代理商: MB91302APFF-G-XXX-BNDE1
MB91301 Series
34
DS07-16502-4E
Program status (PS)
This register holds the program status and is divided into the ILM, SCR, and CCR.
Condition code register (CCR)
System condition code register (SCR)
Interrupt level mask register(ILM)
S flag
: Specifies which stack pointer to use as R15.
I flag
: Enables or disables user interrupt requests.
N flag
: Indicates the sign when an operation result is represented as a “2” complement integer.
Z flag
: Indicates whether an operation result is “0”.
V flag
: Indicates whether an overflow occurred for an operation result when the operation operand is
represented as a “2” complement integer.
C flag
: Indicates whether an operation resulted in a borrow or a carry from the most significant bit.
D1, D0 flags
: Stores intermediate data for stepwise multiplication operations.
T flags
: A flag specifying whether the step trace trap function is enabled or not.
ILM4 to ILM0 : This register stores the interrupt level mask value. The value in the ILM register is used as
the level mask. Only interrupt requests to the CPU that have an interrupt level that is higher
than the level specified in ILM are accepted.
Bit position
PS
31
20
16
ILM
SCR
CCR
10
7
8
0
Initial Value
- - 00XXXXB
CCR
7
6
54
32
1
0
SI
N
Z
V
C
Initial Value
XX0B
SCR
10
9
8
D1
D0
T
20
19
18
17
16
Initial Value
ILM4
ILM3
ILM2
ILM1
ILM0
Interrupt Level
01111B
00
000
0
High
01
000
15
(Medium)
11
111
31
Low
ILM
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