參數(shù)資料
型號(hào)： MBM29F080-12
廠商： Fujitsu Limited
英文描述： 8M (1M ×8) BIT Flash Memory(1M ×8 位5V 電源電壓閃速存儲(chǔ)器)
中文描述： 8米（1米× 8）位快閃記憶體（1米× 8位5V的電源電壓閃速存儲(chǔ)器）
文件頁(yè)數(shù)： 13/50頁(yè)
文件大?。?/td> 667K
代理商： MBM29F080-12
13
MBM29F080
-90/-12
Notes: 1.Address bits A
11
to A
19
= X = H or L for all address commands except or Program Address (PA) and Sector
Address (SA).
2.Bus operations are defined in Table 2.
3.RA = Address of the memory location to be read.
PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of
the WE pulse.
SA = Address of the sector to be erased. The combination of A
19
, A
18
, A
17
, and A
16
will uniquely select any
sector.
4.RD = Data read from location RA during read operation.
PD = Data to be programmed at location PA. Data is latched on the rising edge of WE.
5.Read and Byte program functions to non-erasing sectors are allowed in the Erase Suspend mode.
6.The system should generate the following address pattens: 555H or 2AAH to addresses A
0
to A
10
*: Either of the two reset commands will reset the device.
Command Definitions
Device operations are selected by writing specific address and data sequences into the command register.
Writing incorrect address and data values or writing them in the improper sequence will reset the device to the
read mode. Table 6 defines the valid register command sequences. Note that the Erase Suspend (B0H) and
Erase Resume (30H) commands are valid only while the Sector Erase operation is in progress. Moreover, both
Read/Reset commands are functionally equivalent, resetting the device to the read mode.
Read/Reset Command
The read or reset operation is initiated by writing the read/reset command sequence into the command register.
Microprocessor read cycles retrieve array data from the memory. The device remains enabled for reads until
the command register contents are altered.
The device will automatically power-up in the read/reset state. In this case, a command sequence is not required
to read data. Standard microprocessor read cycles will retrieve array data. This default value ensures that no
Table 6 MBM29F080 Command Definitions
Command
Sequence
Bus
Write
Cycles
Req'd
First Bus
Write Cycle
Second Bus
Write Cycle
Third Bus
Write Cycle
Fourth Bus
Read/Write
Cycle
Fifth Bus
Write Cycle
Sixth Bus
Write Cycle
Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data
Read/Reset*
1
XXX
H
F0H
—
—
—
—
—
—
—
—
—
—
Reset/Read*
3
555H
AAH
2AAH
55H
555H
F0H
RA
RD
—
—
—
—
Manufacture Code
3
555H
AAH
2AAH
55H
555H
90H
00H
04H
—
—
—
—
Device Code
3
555H
AAH
2AAH
55H
555H
90H
01H
05H
—
—
—
—
Byte Program
4
555H
AAH
2AAH
55H
555H
A0H
PA
PD
—
—
—
—
Chip Erase
6
555H
AAH
2AAH
55H
555H
80H
555H
AAH
2AAH
55H
555H
10H
Sector Erase
6
555H
AAH
2AAH
55H
555H
80H
555H
AAH
2AAH
55H
SA
30H
Sector Erase Suspend
Erase can be suspended during sector erase with Addr (H or L). Data (B0H)
Sector Erase Resume
Erase can be resumed after suspend with Addr (H or L). Data (30H)
相關(guān)PDF資料
PDF描述
MBM29F080-90 8M (1M ×8) BIT Flash Memory(1M ×8 位5V 電源電壓閃速存儲(chǔ)器)
MBM29F080A-55 8M (1M X 8) BIT
MBM29F080A Single-Channel Current-Limited Power Distribution Switch 8-MSOP-PowerPAD -40 to 85
MBM29F080AC-90PF 8M (1M X 8) BIT
MBM29F080AC-90PFTN Single-Channel Current-Limited Power Distribution Switch 8-MSOP-PowerPAD -40 to 85
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MBM29F080-90PFTN 制造商:FUJITSU 功能描述:
MBM29F080A 制造商:SPANSION 制造商全稱:SPANSION 功能描述:FLASH MEMORY CMOS 8M (1M x 8) BIT
MBM29F080A-55 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M X 8) BIT
MBM29F080A-55PF 制造商:SPANSION 制造商全稱:SPANSION 功能描述:FLASH MEMORY CMOS 8M (1M x 8) BIT
MBM29F080A-55PFTN 制造商:SPANSION 制造商全稱:SPANSION 功能描述:FLASH MEMORY CMOS 8M (1M x 8) BIT
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