參數(shù)資料
型號: MBM29F080
廠商: Fujitsu Limited
英文描述: CMOS 8M (1M ×8) Bit Flash Memory( 單5V 電源電壓1M ×8位閃速存儲器)
中文描述: 800萬的CMOS(100萬× 8)位快閃記憶體(單5V的電源電壓100萬× 8位閃速存儲器)
文件頁數(shù): 14/22頁
文件大?。?/td> 323K
代理商: MBM29F080
14
MBM29F080
-12-X
Write/Erase/Program Operations
Alternate WE Controlled Writes
Notes: 1.This does not include the preprogramming time.
2.This timing is for Sector Protection operation.
Parameter Symbols
Description
-12-X
Unit
JEDEC
Standard
t
AVAV
t
WC
Write Cycle Time
Min.
120
ns
t
AVWL
t
AS
Address Setup Time
Min.
0
ns
t
WLAX
t
AH
Address Hold Time
Min.
50
ns
t
DVWH
t
DS
Data Setup Time
Min.
50
ns
t
WHDX
t
DH
Data Hold Time
Min.
0
ns
t
OES
Output Enable Setup Time
Min.
0
ns
t
OEH
Output Enable
Hold Time
Read
Min.
0
ns
Toggle Bit I and Data Polling
Min.
10
ns
t
GHWL
t
GHWL
Read Recover Time Before Write (OE high to WE low)
Min.
0
ns
t
ELWL
t
CS
CE Setup Time
Min.
0
ns
t
WHEH
t
CH
CE Hold Time
Min.
0
ns
t
WLWH
t
WP
Write Pulse Width
Min.
50
ns
t
WHWL
t
WPH
Write Pulse Width High
Min.
20
ns
t
WHWH1
t
WHWH1
Byte Programming Operation
Typ.
8
μ
s
t
WHWH2
t
WHWH2
Sector Erase Operation (Note 1)
Typ.
1
sec
Max.
15
sec
t
VCS
V
CC
Setup Time (Note 2)
Min.
50
μ
s
t
VLHT
Voltage Transition Time (Note 2)
Min.
4
μ
s
t
WPP
Write Pulse Width (Note 2)
Min.
100
μ
s
t
OESP
OE Setup Time to WE Active (Note 2)
Min.
4
μ
s
t
CSP
CE Setup Time to WE Active (Note 2)
Min.
4
μ
s
t
RP
RESET Pulse Width
Min.
500
ns
t
BUSY
Program/Erase Valid to RY/BY Delay
Min.
50
ns
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