- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377944 > MBM29F080 (Fujitsu Limited) CMOS 8M (1M ×8) Bit Flash Memory( 單5V 電源電壓1M ×8位閃速存儲器) PDF資料下載
參數(shù)資料
| 型號： | MBM29F080 |
| 廠商： | Fujitsu Limited |
| 英文描述： | CMOS 8M (1M ×8) Bit Flash Memory( 單5V 電源電壓1M ×8位閃速存儲器) |
| 中文描述： | 800萬的CMOS（100萬× 8）位快閃記憶體（單5V的電源電壓100萬× 8位閃速存儲器） |
| 文件頁數(shù)： | 3/22頁 |
| 文件大?。?/td> | 323K |
| 代理商： | MBM29F080 |
3
MBM29F080
-12-X
I
GENERAL DESCRIPTION
The MBM29F080-X is a 8M-bit, 5.0 V-Only Flash memory organized as 1 M bytes of 8 bits each. The 1 M bytes
of data is divided into 16 sectors of 64 K bytes for flexible erase capability. The 8 bit of data will appear on DQ
to DQ
7
. The MBM29F080-X is offered in a 48-pin TSOP and 44-pin SOP packages. This device is designed to
be programmed in-system with the standard system 5.0 V V
or erase operations. The device can also be reprogrammed in standard EPROM programmers.
0
CC
supply. A 12.0 V V
PP
is not required for program
The standard MBM29F080-X offers access times between 90 ns and 120 ns allowing operation of high-speed
microprocessors without wait states. To eliminate bus contention the device has separate chip enable (CE), write
enable (WE), and output enable (OE) controls.
The MBM29F080-X is entirely command set compatible with JEDEC standard single-supply Flash standard.
Commands are written to the command register using standard microprocessor write timings. Register contents
serve as input to an internal state-machine which controls the erase and programming circuitry. Write cycles
also internally latch addresses and data needed for the programming and erase operations. Reading data out
of the device is similar to reading from 12.0 V Flash or EPROM devices.
The MBM29F080-X is programmed by executing the program command sequence. This will invoke the Embed-
ded Program Algorithm which is an internal algorithm that automatically times the program pulse widths and
verifies proper cell margin. Each sector can be programmed and verified in less than 0.5 seconds. Erase is
accomplished by executing the erase command sequence. This will invoke the Embedded Erase Algorithm which
is an internal algorithm that automatically preprograms the array if it is not already programmed before executing
the erase operation. During erase, the device automatically times the erase pulse widths and verifies proper cell
margin.
This device also features a sector erase architecture. The sector erase mode allows for sectors of memory to
be erased and reprogrammed without affecting other sectors. A sector is typically erased and verified within one
second. (if already completely preprogrammed.) The MBM29F080-X is erased when shipped from the factory.
The MBM29F080-X device also features hardware sector group protection. This feature will disable both program
and erase operations in any combination of eight sector groups of memory. A sector group consists of four
adjacent sectors grouped in the following pattern: sectors 0-1, 2-3, 4-5, 6-7, 8-9, 10-11, 12-13, and 14-15.
Fujitsu has implemented an Erase Suspend feature that enables the user to put erase on hold for any period of
time to read data from or program data to a non-busy sector. Thus, true background erase can be achieved.
The device features single 5.0 V power supply operation for both read and program functions. Internally generated
and regulated voltages are provided for the program and erase operations. A low V
inhibits write operations during power transitions. The end of program or erase is detected by the RY/BY output
pin, Data Polling of DQ
7
, or by the Toggle Bit I feature on DQ
been completed, the device automatically resets to the read mode.
CC
detector automatically
6
. Once the end of a program or erase cycle has
The MBM29F080-X also has a hardware RESET pin. When this pin is driven low, execution of any Embedded
Program or Embedded Erase operations will be terminated. The internal state machine will then be reset into
the read mode. The RESET pin may be tied to the system reset circuity. Therefore, if a system reset occurs
during the Embedded Program or Embedded Erase operation, the device will be automatically reset to a read
mode. This will enable the system microprocessor to read the boot-up firmware from the Flash memory.
Fujitsu's Flash technology combines years of EPROM and E
of quality, reliability, and cost effectiveness. The MBM29F080-X memory electrically erases all bits within a sector
simultaneously via Fowler-Nordheim tunneling. The bytes are programmed one byte at a time using the EPROM
programming mechanism of hot electron injection.
2
PROM experience to produce the highest levels
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MBM29F160BE-55PFTN | 16M (2M X 8/1M X 16) BIT |
| MBM29F160BE-55PFTR | 16M (2M X 8/1M X 16) BIT |
| MBM29F160BE-55TN | 16M (2M X 8/1M X 16) BIT |
| MBM29F160BE-55TR | 16M (2M X 8/1M X 16) BIT |
| MBM29F160BE-70PFTN | 16M (2M X 8/1M X 16) BIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MBM29F080-90PFTN | 制造商:FUJITSU 功能描述: |
| MBM29F080A | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:FLASH MEMORY CMOS 8M (1M x 8) BIT |
| MBM29F080A-55 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M X 8) BIT |
| MBM29F080A-55PF | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:FLASH MEMORY CMOS 8M (1M x 8) BIT |
| MBM29F080A-55PFTN | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:FLASH MEMORY CMOS 8M (1M x 8) BIT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。
