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參數(shù)資料
| 型號： | MC13xx |
| 廠商： | Motorola, Inc. |
| 英文描述： | CONVERTER, DC/DC, 1O/P, 5W, 3.3V; Power rating:5W; DC/DC Converter O/P type:Single; Voltage, input max:36V; Voltage, input min:9V; Voltage, output:3.3V; Depth, external:10.2mm; Length / Height, external:31.8mm; Width, RoHS Compliant: Yes |
| 中文描述： | 通用窄帶調(diào)頻接收器集成電路 |
| 文件頁數(shù)： | 42/68頁 |
| 文件大?。?/td> | 1316K |
| 代理商： | MC13XX |
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MC13110A/B MC13111A/B
42
MOTOROLA ANALOG IC DEVICE DATA
the first LO may effect parameters like adjacent channel
rejection and intermodulation. Figure 100 shows a loopfilter
architecture incorporating an additional pole.
From
Phase
Detector
To VCO
R2
C2
C1
Figure 100. Loop Filter
with Additional Integrating Element
C3
R3
For the additional pole formed by R3 and C3 to be efficient,
the cut–off frequency must be much lower than the reference
frequency. However, it must also be higher than wp in order
not to compromise phase margin too much. The following
equations were derived in a similar manner as for the basic
filter previously described.
Similarly, it can be shown:
Aopenloop
–
KpdKo
C3
)
– w2C1C2C3R2R3
Knw2
(
C1
C2
1
1
jwT2
jwT1
(16)
In which:
T1
(
C1
C1
C2
)
T2
C2
(
C1C2
)
T3
w2C1T2T3
C3
(17)
T2
R2C2
T3
R3C3
(19)
(18)
From T1 it can be derived that:
C2
(
T1
T2
)
C3
C1 T2
T3
T1
T1
w2T1T2T3
T3
(20)
In analogy with (10), by forcing the loopgain to 1 (0 dB) at
wp, we obtain:
C1
(
T1
T2
)
C2T3
C3T2
KpdKo
Knwp2
1
wpT2
2
1
wpT1
2
(21)
Solving for C1:
C1
(
T2
T1
)
T3C3
(
T3
T1
)
T2C3
(
T3
T1
)
KpdKoT1
wp2Kn
1
wpT2
2
1
wpT1
2
(
T3
T1
)
T2
(
T3
T1
)
T3
T2
T3
T1
wp2T1T2T3 T3
(22)
By selecting wp via (9), the additional time constant
expressed as T3, can be set to:
T3
1
Kwp
(23)
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