參數(shù)資料
型號: MC13xx
廠商: Motorola, Inc.
英文描述: CONVERTER, DC/DC, 1O/P, 5W, 3.3V; Power rating:5W; DC/DC Converter O/P type:Single; Voltage, input max:36V; Voltage, input min:9V; Voltage, output:3.3V; Depth, external:10.2mm; Length / Height, external:31.8mm; Width, RoHS Compliant: Yes
中文描述: 通用窄帶調(diào)頻接收器集成電路
文件頁數(shù): 57/68頁
文件大?。?/td> 1316K
代理商: MC13XX
MC13110A/B MC13111A/B
57
MOTOROLA ANALOG IC DEVICE DATA
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Figure 135. Auxiliary Register Latch Bits
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SCF Clock
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Divide
Value
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64
64
68
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SCF Clock
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174.22
174.22
163.97
á
á
Corner
Frequency (kHz)
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4.092
4.092
3.851
á
Corner
Frequency (kHz)
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3.903
3.903
3.673
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Frequency
(Clk/40) (kHz)
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Scrambler
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Lower Corner
Frequency (Hz)
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263.7
263.7
248.2
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á
Upper Corner
Frequency (kHz)
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3.850
3.850
3.624
á
á
32
32
34
4.355
4.355
4.099
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NOTES:
20. All filter corner frequencies have a tolerance of
±
3%.
21. Rx and Tx Upper Corner Frequencies are the same corner frequencies for the MC13110A/B in scrambler bypass
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4–b 1st LO Capacitor
Selection
3–b Test Mode
MSB
LSB
MSB
LSB
0
0
0
0
0
0
0
0
0
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4
0
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0
SC Counter
1
ALC Gain = 10 Option
Test Mode Option
0 to 2.5 V
N/A
Input Frequency/SC Counter Value * 2
“Clk Out” Output Expected
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1
0
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0
0
Normal Operation
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0 to 2.5 V
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N/A
2
0
0
1
Rx Counter
Tx Counter
Input Frequency/Rx Counter Value
Input Frequency/Tx Counter Value
Input Frequency/Reference Counter Value * 100
3
0
1
0
1
0 to 2.5 V
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0 to 2.5 V
5
0
1
0
ALC Gain = 25 Option
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6
1
0
1
0
1
1
N/A
N/A
Auxiliary Register
The auxiliary register contains a 4–bit First LO Capacitor
Selection latch and a 3–bit Test Mode latch. Operation of
these latch bits are explained in Figures 135, 136 and 137.
Test Modes
Test modes are be selected through the 3–bit Test Mode
Register. In test mode, the “Tx VCO” input pin is multiplexed
to the input of the counter under test. The output of the
counter under test is multiplexed to the “Clk Out” output pin
so that each counter can be individually tested.
Make sure
test mode bits are set to “0’s” for normal operation.
Test
mode operation is described in Figure 136. During normal
operation, the “Tx VCO” input can be a minimum of 200 mVpp
at 80 MHz and should be AC coupled. Input signals should be
standard logic levels of 0 to 2.5 V and a maximum frequency of
16 MHz.
First Local Oscillator Programmable Capacitor Selection
There is a very large frequency difference between the
minimum and maximum channel frequencies in the 25
Channel U.S. standard. The internal varactor adjustment
range is not large enough to accommodate this large
frequency span. An internal capacitor with 15 programmable
capacitor values can be used to cover the 25 channel
frequency span without the need to add external capacitors
and switches. The programmable internal capacitor can also
be used to eliminate the need to use an external variable
capacitor to adjust the 1st LO center frequency during
telephone assembly. Figure 32 shows the schematic of the
1st LO tank circuit. Figure 137 shows the register control bit
values.
The internal programmable capacitor is composed of a
matrix bank of capacitors that are switched in as desired.
Programmable capacitor values between about 0 and 16 pF
can be selected in steps of approximately 1.1 pF. The internal
parallel resistance values in the table can be used to
calculate the quality factor (Q) of the oscillator if the Q of the
external inductor is known. The temperature coefficient of the
varactor is 0.08%/
°
C. The temperature coefficient of the
internal programmable capacitor is negligible. Tolerance on
the varactor and programmable capacitor values is
±
15%.
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