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參數(shù)資料
| 型號(hào)： | MC33989DW |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 46/72頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SYSTEM BASE W/CAN 28-SOIC |
| 標(biāo)準(zhǔn)包裝： | 26 |
| 控制器類型： | 系統(tǒng)基礎(chǔ)芯片 |
| 接口： | CAN |
| 電源電壓： | 5.5 V ~ 18 V |
| 電流 - 電源： | 45mA |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SOIC W |
| 包裝： | 管件 |
| 配用： | KIT33989DWEVB-ND - KIT EVAL 33989DW HS SBC |
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Analog Integrated Circuit Device Data
50
Freescale Semiconductor
33989
TYPICAL APPLICATIONS
SUPPLEMENTAL APPLICATION NOTES
T1: Is dependent on the selected cyclic sense timing in the TIM2 register (5.0 to 400 ms). LX is sampled 10 s before the
end of cyclic sense on time. If the LX correct wake-up level happens just after sample point, the wake-up will be detected
at the next HS1 activation and a complete period is lost.
T2: It is the same than Lx to INT pulse: typ 100 s
The total time is around 5.13 ms (for a cyclic sense total time of 5.0 ms) in the above example.
MC33989 CAN INTERFACE
This section is a detailed description of the CAN interface of the MC33989.
Block Diagram
Figure 34 is a simplified block diagram of the CAN interface of the MC33989.
Figure 34. 33989 CAN Interface
CAN Interface Supply
The supply voltage for the CAN driver is the V2 pin. The CAN interface also has a supply path from the battery line, through
the pin VSUP. This path is used in CAN sleep mode to allow wake-up detection.
During CAN communication (transmission and reception) the CAN interface current is sourced from the V2 pin. During a CAN
low power mode, the current is sourced from the VSUP pin.
Main Operation Modes Description
The CAN interface of the MC33989 has two main operation modes: Normal mode and sleep mode. The modes are controlled
by the SPI command.
In normal mode, used for communication, four different slew rates are available for the user.
In sleep mode, the user has the option to enable or disable the remote CAN wake-up capability.
CAN Driver Operation in Normal Mode
When the CAN interface of the MC33989 is in Normal mode, the driver has two states: recessive or dominant. The driver state
is controlled by the TX pin. The bus state is reported through the RX pin.
When TX is high, the driver is set in a recessive state, CANH and CANL lines are biased to the voltage set at V2 divided by
2, approx. 2.5 V.
When TX is low, the bus is set into dominant state: the CANL and CANH drivers are active. CANL is pulled to gnd, CANH is
pulled high toward 5.0 V (the voltage at V2).
The RX pin reports the bus state: the CANH minus the CANL voltage is compared versus an internal threshold (a few hundred
mV). If “CANH minus CANL” is below the threshold, the bus is recessive and RX is set high.
V2
Bus termination (60 ohms)
CANH line
CAN L line
TX
RX
Differential
receiver
Driver
2.5V
Wake-up
receiver
pattern
recognition
Internal
VSUP
wake-up
signal
CANH
CANL
SPI control
V2
QH
QL
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| MC33990D | 功能描述:IC TRANSCEIVER J-1850 BUS 8-SOIC RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
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