參數(shù)資料
型號: MC56F8025MLD
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP44
封裝: 10 X 10 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, MS-026BCB, LQFP-44
文件頁數(shù): 67/161頁
文件大小: 2160K
代理商: MC56F8025MLD
Electrical Design Considerations
56F8035/56F8025 Data Sheet, Rev. 6
Freescale Semiconductor
159
Inter-Integrated Circuit Interface (I2C) Module
Control Register
CTRL
IBCR
I2C_CTRL
I2C_IBCR
0xF280
Target Address
Register
TAR
I2C_TAR
I2CTAR
I2C_TAR
0xF282
Slave Address
Register
SAR
I2C_SAR
I2CSAR
I2C_SAR
0xF242
Data Buffer &
Command Register
DATA
I2C_DATA
I2C_DATACMD
0xF288
Standard Speed
Clock SCL High
Count Register
SSHCNT
I2C_SS_SCL_HCNT
I2C_SS_SCLHCNT
0xF28A
Standard Speed
Clock SCL Low Count
Register
SSLCNT
I2C_SS_SCL_LCNT
I2C_SS_SCLLCNT
0xF28C
Fast Speed Clock
SCL High Count
Register
FSHCNT
I2C_FS_SCL_HCNT
I2C_FS_SCLHCNT
0xF28E
Fast Speed Clock
SCL Low Count
Register
FSLCNT
I2C_FS_SCL_LCNT
I2C_FS_SCLLCNT
0xF290
Interrupt Status
Register
ISTAT
I2C_INTR_STAT
I2C_INTRSTAT
0xF296
Interrupt Mask
Register
IENBL
I2C_INTR_MASK
I2C_INTRMASK
0xF298
Raw Interrupt Status
Register
RISTAT
I2C_RAW_INTR_STAT
I2C_RAW_INTRSTAT
0xF29A
Receive FIFO
Threshold Level
Register
RXFT
I2C_RXTL
0xF29C
Transmit FIFO
Threshold Level
Register
TXFT
I2C_TXTL
0xF29E
Clear Combined &
Individual Interrupts
Register
CLRINT
I2C_CLRINTR
0xF2A0
Clear Receive Under
Interrupt Register
CLRRXUND
I2C_CLR_RXUNDER
0xF2A2
Clear Receive Over
Interrupt Register
CLRRXOVR
I2C_CLROVER
0xF2A4
Clear Transmit Over
Register
CLRTXOVR
I2C_CLR_TXOVER
0xF2A6
Clear Read Required
Interrupt Register
CLRRDREQ
I2C_CLR_RDREQ
0xF2A8
Clear Transmit Abort
Interrupt Register
CLRTXABRT
I2C_CLR_TXABRT
0xF2AA
Table 14-1 Legacy and Revised Acronyms (Continued)
Register Name
Peripheral Reference
Manual
Data Sheet
Processor Expert
Acronym
Memory
Address
New
Acronym
Legacy
Acronym
New
Acronym
Legacy
Acronym
Start
End
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