參數(shù)資料
型號： MC56F8323MFB60
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 數(shù)字信號處理
英文描述： 0-BIT, 120 MHz, OTHER DSP, PQFP64
封裝： PLASTIC, LQFP-64
文件頁數(shù)： 59/140頁
文件大小： 741K
代理商： MC56F8323MFB60
Signal Pins
56F8323 Technical Data, Rev. 17
Freescale Semiconductor
25
Preliminary
PWMA2
(SS1)
(GPIOA2)
7
Output
Schmitt
Input
Schmitt
Input/
Output
In reset,
output is
disabled,
pull-up is
enabled
PWMA2 — This is one of six PWMA output pins.
SPI 1 Slave Select — SS1 is used in slave mode to indicate to the
SPI module that the current transfer is to be received.
Port A GPIO — This GPIO pin can be individually programmed as
an input or output pin.
In the 56F8323, the default state after reset is PWMA2.
In the 56F8123, the default state is not one of the functions offered
and must be reconfigured.
PWMA3
(MISO1)
(GPIOA3)
8
Output
Schmitt
Input/
Output
Schmitt
Input/
Output
In reset,
output is
disabled,
pull-up is
enabled
PWMA3 — This is one of six PWMA output pins.
SPI 1 Master In/Slave Out — This serial data pin is an input to a
master device and an output from a slave device. The MISO line of a
slave device is placed in the high-impedance state if the slave device
is not selected. The slave device places data on the MISO line a
half-cycle before the clock edge the master device uses to latch the
data.
Port A GPIO — This GPIO pin can be individually programmed as
an input or output pin.
In the 56F8323, the default state after reset is PWMA3.
In the 56F8123, the default state is not one of the functions offered
and must be reconfigured.
PWMA4
(MOSI1)
(GPIOA4)
9
Output
Schmitt
Input/
Output
Schmitt
Input/
Output
In reset,
output is
disabled,
pull-up is
enabled
PWMA4 — This is one of six PWMA output pins.
SPI 1 Master Out/Slave In — This serial data pin is an output from a
master device and an input to a slave device. The master device
places data on the MOSI line a half-cycle before the clock edge the
slave device uses to latch the data.
Port A GPIO — This GPIO pin can be individually programmed as
an input or output pin.
In the 56F8323, the default state after reset is PWMA4.
In the 56F8123, the default state is not one of the functions offered
and must be reconfigured.
Table 2-2 Signal and Package Information for the 64-Pin LQFP
Signal Name
Pin No.
Type
State During
Reset
Signal Description
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC56F8323MFBE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8323VFB60 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8323VFBE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8335 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controller
MC56F8335E 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controller
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