參數(shù)資料
型號(hào): MC56F8323MFB60
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數(shù)字信號(hào)處理
英文描述: 0-BIT, 120 MHz, OTHER DSP, PQFP64
封裝: PLASTIC, LQFP-64
文件頁(yè)數(shù): 66/140頁(yè)
文件大?。?/td> 741K
代理商: MC56F8323MFB60
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Use of On-Chip Relaxation Oscillator
56F8323 Technical Data, Rev. 17
Freescale Semiconductor
31
Preliminary
Figure 3-2 Connecting a Ceramic Resonator
Note:
The OCCS_COHL bit must be set to 0 when a crystal resonator is used. The reset condition on the
OCCS_COHL bit is 0. Please see the COHL bit in the Oscillator Control (OSCTL) register, discussed
in the 56F8300 Peripheral User Manual.
3.2.3
External Clock Source
The recommended method of connecting an external clock is illustrated in Figure 3-3. The external clock source is
connected to XTAL and the EXTAL pin is grounded.
The external clock input must be generated using a
relatively low impedance driver, as the XTAL pin is actually the output pin of the oscillator (it has a very
weak driver).
Figure 3-3 Connecting an External Clock Signal
3.3 Use of On-Chip Relaxation Oscillator
An internal relaxtion oscillator can supply the reference frequency when an external frequency source of
crystal is not used. During a boot or reset sequence, the relaxation oscillator is enabled by default, and the
PRECS bit in the PLLCR word is set to 0. If an external oscillator is connected, the relaxation oscillator
can be deselected instead by setting the PRECS bit in the PLLCR to 1. If a changeover between internal
and external oscillators is required at start up, internal device circuits compensate for any asynchronous
transitions between the two clock signals so that no glitches occur in the resulting master clock to the chip.
When changing clocks, the user must ensure that the clock source is not switched until the desired clock
is enabled and stable.
To compensate for variances in the device manufacturing process, the accuracy of the relaxation oscillator
can be incrementally adjusted to within + 0.1% of 8MHz by trimming an internal capacitor. Bits 0-9 of the
OSCTL (oscillator control) register allow the user to set in an additional offset (trim) to this preset value
EXTAL XTAL
Rz
Sample External Ceramic Resonator Parameters:
Rz = 750 KΩ
EXTAL XTAL
Rz
C1
CL1
CL2
C2
Resonator Frequency = 4 - 8MHz (optimized for 8MHz)
3 Terminal
2 Terminal
CLKMODE = 0
XTAL
EXTAL
External
VSS
Clock
Note: When using an external clocking
source with this configuration, the
“CLKMODE” and COHL bits of the OSCTL
register should be set to 1.
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