參數(shù)資料
型號(hào)： MC56F8346VFV60
廠商： MOTOROLA INC
元件分類： 數(shù)字信號(hào)處理
英文描述： 56F8346 16-bit Hybrid Controller
中文描述： 16-BIT, 120 MHz, OTHER DSP, PQFP144
封裝： LQFP-144
文件頁數(shù)： 98/160頁
文件大?。?/td> 1415K
代理商： MC56F8346VFV60
98
56F8346 Technical Data
Preliminary
6.3 Operating Modes
Since the SIM is responsible for distributing clocks and resets across the chip, it must understand
the various chip operating modes and take appropriate action. These are:
Reset Mode,
which has two submodes:
— POR and RESET operation
The 56800E core and all peripherals are reset. This occurs when the internal POR is asserted or
the RESET pin is asserted.
— COP reset and software reset operation
The 56800E core and all peripherals are reset. The MA bit within the OMR is not changed. This
allows the software to determine the boot mode (internal or external boot) to be used on the next
reset.
Run Mode
This is the primary mode of operation for this device. In this mode, the 56800E controls chip
operation.
Debug Mode
The 56800E is controlled via JTAG/EOnCE when in debug mode. All peripherals, except the COP
and PWMs, continue to run. COP is disabled and PWM outputs are optionally switched off to
disable any motor from being driven; see the PWM chapter in the
56F8300 Peripheral User
Manual
for details.
Wait Mode
In Wait mode, the core clock and memory clocks are disabled. Optionally, the COP can be stopped.
Similarly, it is an option to switch off PWM outputs to disable any motor from being driven. All
other peripherals continue to run.
Stop
Mode
When in Stop mode, the 56800E core, memory, and most peripheral clocks are shut down.
Optionally, the COP and CAN can be stopped. For lowest power consumption in Stop mode, the
PLL can be shut down. This must be done explicitly before entering Stop mode, since there is no
automatic mechanism for this. The CAN (along with any non-gated interrupt) is capable of waking
the chip up from Stop mode, but is not fully functional in Stop mode.
6.4 Operation Mode Register
Figure 6-1 OMR
See
Section 4.2
for detailed information on how the Operating Mode Register (OMR) MA and MB
bits operate in this device. For additional information on the EX bit, see
Section 4.4
. For all other
bits, see the DSP56800E Reference Manual.
Note:
The OMR is not a Memory Map register; it is directly accessible in code through the acronym
OMR.
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
NL
CM
XP
SD
R
SA
EX
0
MB
MA
Type
RESET
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC56F8346VFVE 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 16 BIT HYBRID CNTRLR RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8346VFVER2 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 16 BIT HYBRID CNTRLR RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8347 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
MC56F8347MPY60 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-BIT HYBRID CONTROLLERS
MC56F8347MPYE 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
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