Serial Communication Controllers (SCCs)
7-166
MC68360 USER’S MANUAL
MOTOROLA
GLt—Glitch on Tx
A clock glitch was detected by this SCC on the transmit clock.
AB—Auto Baud
An auto baud lock was detected. The CPU32+ core should rewrite the baud rate genera-
tor with the precise divider value for the desired baud rate. See 7.9 Baud Rate Generators
(BRGs) for more details.
IDL—Idle Sequence Status Changed
A change in the status of the serial line was detected on the UART channel. The real-time
status of the line may be read in SCCS. Idle is entered when one character of all ones is
received. It is exited when a single zero is received.
GRA—Graceful Stop Complete
A graceful stop, which was initiated by the GRACEFUL STOP TRANSMIT command, is
now complete. This bit is set as soon the transmitter has finished transmitting any buffer
that was in progress when the command was issued. It will be set immediately if no buffer
was in progress when the command was issued.
BRKe—Break End
The end of a break sequence was detected. This indication will be set no sooner than after
one idle bit is received following a break sequence.
BRKs—Break Start
A break character was received. This is the first break of a break sequence. The user will
not receive multiple BRKs events if a long break sequence is received.
CCR—Control Character Received
A control character was received (with reject (R) character = 1) and stored in the receive
control character register (RCCR).
BSY—Busy Condition
A character was received and discarded due to lack of buffers. If the multidrop mode is
selected, the receiver automatically enters hunt mode immediately. Otherwise, reception
continues as soon as an empty buffer is provided. The latest that an Rx BD can be made
empty (have its E-bit set) and still guarantee avoiding the busy condition is the middle of
the stop bit of the first character to be stored in that buffer.
TX—Tx Buffer
A buffer has been transmitted over the UART channel. If CR = 1 in the Tx BD, this bit is
set no sooner than when the last stop bit of the last character in the buffer begins to be
transmitted. If CR = 0, this bit is set after the last character was written to the transmit
FIFO.
RX—Rx Buffer
A buffer has been received over the UART channel. This event occurs no sooner than the
middle of the first stop bit of the character that caused the buffer to be closed.