參數(shù)資料
型號: MC68HC05J3CP
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP20
封裝: PLASTIC, DIP-20
文件頁數(shù): 73/92頁
文件大小: 912K
代理商: MC68HC05J3CP
MC68HC05J3
MOTOROLA
9-3
ELECTRICAL SPECIFICATIONS
9
9.3
DC electrical characteristics
(1) All IDD measurements taken with suitable decoupling capacitors across the power supply to suppress the
transient switching currents inherent in CMOS designs (see Section 2.2.1).
(2) Typical values are at mid point of voltage range and at 25
°C only.
(3) RUN and WAIT IDD: measured using an external square-wave clock source (fOSC = 4.2 MHz); all inputs
0.2V from rail; no DC loads; maximum load on outputs 50pF (except OSC2 load 20pF).
WAIT IDD: only the timer system active; current varies linearly with the OSC2 capacitance.
WAIT and STOP IDD: all ports congured as inputs; VIL = 0.2V and VIH = VDD – 0.2V.
STOP IDD: measured with OSC1 = VDD.
Table 9-3 DC electrical characteristics for 5V operation
(VDD = 5.0 Vdc ± 10%, VSS = 0 Vdc, TA = TL to TH
Characteristic(1)
Symbol
Min
Typ(2)
Max
Unit
Output high voltage (ILOAD = – 25 A)
VOH
VDD – 0.1
V
Output low voltage (ILOAD = +25 A)
VOL
0.1
V
Output high voltage (ILOAD = – 0.8 mA)
PA0–7, PB0–5
VOH
VDD – 0.8
VDD – 0.1
V
Output low voltage (ILOAD = +1.6 mA)
PA0–7, PB0–5
VOL
0.2
0.4
V
Output low voltage (ILOAD = +8 mA)
PA0–7, PB0–5
VOL
0.4
0.8
V
Input high voltage
PA0–7, PB0–5, OSC1, IRQ, RESET
VIH
0.7VDD
VDD
V
Input low voltage
PA0–7, PB0–5, OSC1, IRQ, RESET
VIL
VSS
0.2VDD
V
Supply current(3)
RUN (at 2.1 MHz bus frequency)
WAIT (at 2.1 MHz bus frequency)
STOP (oscillators off, 0 to 70
°)
IDD
5.0
2.5
1
10
4
100
mA
A
I/O ports high-Z leakage current
PA0–7, PB0–5
IOZ
±10
A
Inputs high-Z leakage current
IRQ, RESET, OSC1
IOZ
±1
A
Capacitance
Ports (as input or output)
IRQ, RESET
COUT
CIN
12
TBD
pF
TPG
72
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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