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參數(shù)資料
| 型號： | MC68HC05JB3DW |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 3 MHz, MICROCONTROLLER, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁數(shù)： | 129/148頁 |
| 文件大?。?/td> | 1600K |
| 代理商： | MC68HC05JB3DW |
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November 5, 1998
GENERAL RELEASE SPECIFICATION
MC68HC05JB3
UNIVERSAL SERIAL BUS MODULE
MOTOROLA
REV 1
10-13
The receiver features an input sensitivity of 200 mV when both differential data
inputs are in the range of 0.8 V to 2.5 V with respect to the local ground reference.
This is called the common mode input voltage range. Proper data reception is also
achieved when the differential data lines are outside the common mode range, as
shown in Figure 10-13. The receiver can tolerate static input voltages between
–0.5V to 3.8 V with respect to its local ground reference without damage. In
addition to the differential receiver, there is a single-ended receiver (schmitt
trigger) for each of the two data lines.
Figure 10-13. Differential Input Sensitivity Over Entire Common Mode Range
10.4.3.1 Receiver Data Jitter
The data receivers for all types of devices must be able to properly decode the
differential data in the presence of jitter. The more of the bit cell that any data edge
can occupy and still be decoded, the more reliable the data transfer will be. Data
receivers are required to decode differential data transitions that occur in a
window plus and minus a nominal quarter bit cell from the nominal (centered) data
edge position.
Jitter will be caused by the delay mismatches and by mismatches in the source
and destination data rates (frequencies). The receive data jitter budget for low
speed is given in the electrical section of the this specication. The specication
includes the consecutive (next) and paired transition values for each source of
jitter.
10.4.3.2 Data Source Jitter
The source of data can have some variation (jitter) in the timing of edges of the
data
transmitted.
The
time
between
any
set
of
data
transitions
is
N x TPERIOD ± jitter time, where ‘N’ is the number of bits between the transitions
and TPERIOD is dened as the actual period of the data rate. The data jitter is
COMMON MODE INPUT VOLTAGE (VOLTS)
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
3.0
3.2
1.0
0.8
0.6
0.4
0.2
MINIM
UM
DIFF
ERENTIAL
SENSITIVITY
(V
OLTS)
0
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