參數(shù)資料
型號： MC68HC05P18A
廠商： Motorola, Inc.
英文描述： Low Cost HCMOS Microcontroller(低成本、8位HCMOS微控制器)
中文描述： 低成本HCMOS微控制器（低成本，8位HCMOS微控制器）
文件頁數(shù)： 60/130頁
文件大小： 1200K
代理商： MC68HC05P18A
L
G
R
Input/Output (I/O) Ports
Technical Data
MC68HC05P18A
60
Input/Output (I/O) Ports
MOTOROLA
7.7 I/O Port Programming
Each pin on ports A through port D, with the exception of pin 7 of port D,
may be programmed as an input or an output under software control as
shown in
Table 7-1
,
Table 7-2
,
Table 7-3
, and
Table 7-4
.
The direction of a pin is determined by the state of its corresponding bit
in the associated port data direction register (DDR). A pin is configured
as an output if its corresponding DDR bit is set to a logic 1. A pin is
configured as an input if its corresponding DDR bit is cleared to a logic 0.
Table 7-1. Port A I/O Pin Functions
DDRA
I/O Pin Mode
Access
to DDRA @ $0004
Access
to Data Register @ $0000
Read/Write
Read
Write
0
In, Hi-Z
DDRA0–DDRA7
I/O pin
See note
1
Out
DDRA0–DDRA7
PA0–PA7
PA0–PA7
Note: Does not affect input, but stored to data register
Table 7-2. Port B I/O Pin Functions
DDRB
I/O Pin Mode
Access
to DDRB @ $0005
Access
to Data Register @ $0001
Read/Write
Read
Write
0
In, Hi-Z
DDRB5–DDRB7
I/O pin
See note
1
Out
DDRB5–DDRB7
PB5–PB7
PB5–PB7
Note: Does not affect input, but stored to data register
Table 7-3. Port C I/O Pin Functions
DDRC
I/O Pin Mode
Access
to DDRC @ $0006
Access
to Data Register @ $0002
Read/Write
Read
Write
0
In, Hi-Z
DDRC0–DDRC7
I/O pin
See note
1
Out
DDRC0–DDRC7
PC0–PC7
PC0–PC7
Note: Does not affect input, but stored to data register
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