參數(shù)資料
型號: MC68HC05P18A
廠商: Motorola, Inc.
英文描述: Low Cost HCMOS Microcontroller(低成本、8位HCMOS微控制器)
中文描述: 低成本HCMOS微控制器(低成本,8位HCMOS微控制器)
文件頁數(shù): 78/130頁
文件大?。?/td> 1200K
代理商: MC68HC05P18A
L
G
R
Serial Input/Output Ports (SIOP)
Technical Data
MC68HC05P18A
78
Serial Input/Output Ports (SIOP)
MOTOROLA
application software, these actions could affect the transmitted or
received data.
Figure 9-1. SIOP Block Diagram
9.3 SIOP Signal Format
The SIOP subsystem is software configurable for master or slave
operation. There are no external mode selection inputs available (for
example, slave select pin).
9.3.1 Serial Clock (SCK)
The state of the SCK output normally remains a logic 1 during idle
periods between data transfers. The first falling edge of SCK signals the
beginning of a data transfer. At this time the first bit of received data is
accepted at the SDI pin and the first bit of transmitted data is presented
at the SDO pin (see
Figure 9-2
). Data is captured at the SDI pin on the
rising edge of SCK, and the first bit of transmitted data is presented at
the SDO pin. The transfer is terminated upon the eighth rising edge of
SCK.
8-BIT
SHIFT
REGISTER
$0C
STATUS
REGISTER
BAUD
RATE
CONTROL
REGISTER
GENERATOR
HCO5 INTERNAL BUS
PH2 CLOCK
SCK
SDI
SDO
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
I/O
$0B
$0A
CONTROL
LOGIC
SPE
SDI/PB6
SCK/PB7
SDO/PB5
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