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參數(shù)資料
| 型號(hào)： | MC68HC11A8 |
| 廠(chǎng)商： | Motorola, Inc. |
| 元件分類(lèi)： | 8位微控制器 |
| 英文描述： | 8-Bit Microcontroller(8位微控制器) |
| 中文描述： | 8位微控制器（8位微控制器） |
| 文件頁(yè)數(shù)： | 247/512頁(yè) |
| 文件大小： | 4071K |
| 代理商： | MC68HC11A8 |
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M68HC11
REFERENCE MANUAL
ASYNCHRONOUS SERIAL COMMUNICATIONS INTERFACE
MOTOROLA
9-17
of the start bit for the next data character.
If the transmitter is busy transmitting a character when SBK is toggled on and back off
by software, exactly one break character will be produced following completion of the
character that was being transmitted. If the transmitter is idle at the time the SBK bit is
toggled on and off, it is not certain whether one or two break characters will be sent.
When SBK is set to one, a break character is queued. When the transmit shift register
becomes available and synchronization requirements are met with respect to the in-
ternal 1 x baud-rate clock, the queued break character is jammed into the shift register
to be serially sent and, if the SBK bit is still one, another break is queued. The transfer
mechanism from the queue to the shifter is internally synchronized to the 1 x baud-rate
clock; however, the relationship of this clock to operating software is not normally
known. The instructions to write one and then write zero to the SBK bit execute very
quickly relative to a normal baud-rate frequency, but there is still a small probability
that the baud-rate clock edge could occur between writing the one and writing the zero
to SBK.
9.3.4 Queued Idle Character
When the SCI transmitter is not sending some character, it is idle and the TxD line
rests at logic one. This idle-line condition can last for essentially any length of time and
should not be confused with idle characters. Idle characters are character-length pe-
riods where the TxD line goes to logic one. The character length for all characters, in-
cluding idle and break characters, is influenced by the M bit in SCCR1. When M equals
zero, all characters are 10 bit times long; when M equals one, all characters are 11 bit
times long. Idle characters have no start or stop bits.
Idle characters are only produced when the transmitter is enabled from a disabled
state (TE changed from zero to one). The first time the transmitter is enabled, this idle
character acts as a preamble. The character-length period of logic one assures that
any receiver connected to this transmitter will be resynchronized so that it can properly
recognize the leading edge of the start bit for the next character.
Software can queue an idle character into a serial data stream by momentarily turning
TE off and then back on again. This queueing function is useful when using the idle-
line variation of receiver wake up. In a multi-drop SCI network, all receivers evaluate
the first characters) of a message to decide whether or not this message is important
to this receiver. If not, receiver wake up is invoked by writing a one to the RWU bit in
SCCR2. A one in RWU causes the receiver to ignore any other characters in the mes-
sage, thus allowing the MCU to perform more useful functions than responding to in-
terrupts from the SCI. The SCI receiver is still monitoring characters normally except
that status flags and interrupts are not being produced. When idle-line wake up is be-
ing used, the SCI receive logic automatically clears RWU (waking up the receiver)
when it sees a full character time of logic one. During a message, there must never be
any gap between characters within a message because even a single bit time of idle
can trigger wake up if the previous character was $FF. The queued idle function allows
exactly one character time of idle to be inserted into the data steam to maintain max-
imum efficiency and data throughput. Before queued idle was available, software had
to avoid writing to the TDR for two or more character times after seeing TDRE go high,
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