參數(shù)資料
型號: MC68HC11A8BMP2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDIP48
封裝: PLASTIC, DIP-48
文件頁數(shù): 23/158頁
文件大小: 3803K
代理商: MC68HC11A8BMP2
CPU, ADDRESSING MODES, AND INSTRUCTION SET
MOTOROLA
TECHNICAL DATA
10-21
10
Table 10-7 Cycle-by-Cycle Operation — Indexed Y Mode (Sheet 1 of 2)
Reference
Number*
Address Mode
and Instructions
Cycles Cycle
#
Address Bus
R/W
Line
Data Bus
7-1
JMP
4
1
2
3
4
Opcode Address
Opcode Address + 1
Opcode Address + 2
$FFFF
1
Opcode (Page Select Byte)
($18)
Opcode (Second Byte) ($6E)
Index Offset
Irrelevant Data
7-2
ADCA, ADCB, ADDA,
ADDB, ANDA ANDB,
BITA, BITB, CMPA,
CMPB, EORA, EORB,
LDAA, LDAB, ORAA,
ORAB, SBCA, SBCB,
SUBA, SUBB,
51
2
3
4
5
Opcode Address
Opcode Address + 1
Opcode Address + 2
$FFFF
(IY) + Offset
1
Opcode (Page Select Byte)
($18)
Opcode (Second Byte)
Index Offset
Irrelevant Data
Operand Data
7-3
ASL, ASR, CLR,
COM, DEC, INC,
LSL, LSR, NEG,
ROL, ROR
71
2
3
4
5
6
7
Opcode Address
Opcode Address + 1
Opcode Address + 2
$FFFF
(IY) + Offset
$FFFF
(IY) + Offset
1
0
Opcode (Page Select Byte)
Opcode (Second Byte)
Index Offset
Irrelevant Data
Original Operand Data
Irrelevant Data
Result Operand Data
7-4
TST
7
1
2
3
4
5
6
7
Opcode Address
Opcode Address + 1
Opcode Address + 2
$FFFF
(IY) + Offset
$FFFF
1
Opcode (Page Select Byte)
($18)
Opcode (Second Byte) ($6D)
Index Offset
Irrelevant Data
Original Operand Data
Irrelevant Data
7-5
STAA, STAB
5
1
2
3
4
5
Opcode Address
Opcode Address + 1
Opcode Address + 2
$FFFF
(IY) + Offset
1
0
Opcode (Page Select Byte)
($18)
Opcode (Second Byte)
Index Offset
Irrelevant Data
Accumulator Data
7-6
LDD, LDS, LDX,
LDY
61
2
3
4
5
6
Opcode Address
Opcode Address + 1
Opcode Address + 2
$FFFF
(IY) + Offset
(IY) + Offset + 1
1
Opcode (Page Select Byte)
Opcode (Second Byte)
Index Offset
Irrelevant Data
Operand Data (High Byte)
Operand Data (Low Byte)
7-7
STD, STS, STX,
STY
61
2
3
4
5
6
Opcode Address
Opcode Address + 1
Opcode Address + 2
$FFFF
(IY) + Offset
(IY) + Offset + 1
1
0
Opcode (Page Select Byte)
Opcode (Second Byte)
Index Offset
Irrelevant Data
Register Data (High Byte)
Register Data (Low Byte)
7-8
ADDD, CPD, CPX,
CPY, SUBD
71
2
3
4
5
6
7
Opcode Address
Opcode Address + 1
Opcode Address + 2
$FFFF
(IY) + Offset
(IY) + Offset + 1
$FFFF
1
Opcode (Page Select Byte)
Opcode (Second Byte)
Index Offset
Irrelevant Data
Operand Data (High Byte)
Operand Data (Low Byte)
Irrelevant Data
* The reference number is given to provide a cross-reference to Table 10-1.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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