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參數(shù)資料
| 型號： | MC68HC16Y1 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 16-Bit Modular Microcontroller(16位模塊化微控制器) |
| 中文描述： | 16位微控制器模塊（16位模塊化微控制器） |
| 文件頁數(shù)： | 62/122頁 |
| 文件大小： | 749K |
| 代理商： | MC68HC16Y1 |
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MOTOROLA
62
MC68HC16Y1
MC68HC16Y1TS/D
3.10 Emulation Mode Chip Select Signals
Emulation mode chip select signals are used during external register or ROM emulation. Pin function is
controlled by a chip select pin assignment register, but the other chip select registers do not affect these
signals.
During emulator mode operation, all port A, B, E, G, and H data and data direction registers, and the
port E pin assignment register are mapped externally. The emulator chip select signal CSE is asserted
when any of these registers is addressed. The SCIM does not respond to these accesses — an external
device, such as a port replacement unit, can respond instead. See
3.3 Emulation Support
for more
information.
An internal module chip select signal CSM can also be enabled during emulator mode operation. When
the ROM module is enabled, CSM is asserted when an access to an address assigned to the masked
ROM array is made — this allows an external device to emulate the ROM. Internal DSACK is generated
by the ROM module after it has inserted the number of wait states specified by the WAIT field in the
MRMCR. See
9 Masked ROM Module
for more information.
3.10.1 Chip Select Registers
Pin assignment registers (CSPAR) determine functions of chip select pins. Pin assignment registers
also determine port size (8- or 16-bit) for dynamic bus allocation.
A pin data register (PORTC) latches discrete output data.
Blocks of addresses are assigned to each chip select function. Block sizes of 2 Kbytes to 1 Mbyte can
be selected by writing values to the appropriate base address register (CSBAR). However, because the
logic state of ADDR20 is always the same as the state of ADDR19 in the MC68HC16Y1, the largest
usable block size is 512 Kbytes. Address blocks for separate chip select functions can overlap.
Chip select option registers (CSOR) determine timing of and conditions for assertion of chip select sig-
nals. Eight parameters, including operating mode, access size, synchronization, and wait state insertion
can be specified.
Initialization code often resides in a peripheral memory device controlled by the chip select circuits. A
set of special chip select functions and registers (CSORBT, CSBARBT) is provided to support bootstrap
operation.
Table 22 Chip Select Pin Allocation
Chip Select
Function
CSBOOT
CS0
CSM
CSE
CS3
—
CS5
CS6
CS7
CS8
CS9
CS10
Alternate
Function
CSBOOT
BR
BG
BGACK
FC0
FC1
FC2
ADDR19
ADDR20
ADDR21
ADDR22
ADDR23
Discrete Outputs
Function
—
—
—
—
PC0
PC1
PC2
PC3
PC4
PC5
PC6
ECLK
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC16Z1CAG | 制造商:Freescale Semiconductor 功能描述: |
| MC68HC16Z1CAG16 | 功能描述:16位微控制器 - MCU 16 BIT MCU 1K RAM RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT |
| MC68HC16Z1CAG16 | 制造商:Freescale Semiconductor 功能描述:IC16-BIT MICROCONTROLLER |
| MC68HC16Z1CAG20 | 功能描述:16位微控制器 - MCU 16 BIT MCU 1K RAM RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT |
| MC68HC16Z1CAG20 | 制造商:Freescale Semiconductor 功能描述:Microcontroller |
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