參數(shù)資料
型號： MC68HC805K3DW
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, EEPROM, 2 MHz, MICROCONTROLLER, PDSO16
封裝： SOIC-16
文件頁數(shù)： 85/119頁
文件大?。?/td> 496K
代理商： MC68HC805K3DW
General Release Specication
I/O Port Programming
MC68HC805K3 — Rev. 1.0
68
Parallel Input/Output
MOTOROLA
If the mask option register bit for software programmable pulldowns is
selected, a floating input can be avoided by first clearing the pulldown
register bit before changing the corresponding DDR from a one to a
zero. This ensures that the pulldown device is activated on the pin as the
I/O pin changes from a driven output to a pulled low input.
7.5.5 I/O Pin Truth Tables
Every pin on port A and PB0 on port B may be programmed as an input
or an output under software control, as shown in Table 7-1 and
Table 7-2. All port I/O pins also may have software programmable
pulldown devices selected by a mask option register bit. The PB1/OSC3
pin on port B also can be programmed as an input or an output under
software control, but it has special considerations when selected by a
mask option register bit as an output for the 3-pin RC oscillator, as
shown in Table 7-3. Otherwise, PB1/OSC3 behaves the same as PB0.
Table 7-1. Port A Pin Functions
Software
Prog.
Pulldown
Mask Option
Register Bit*
PDIAx
DDRAx
I/O Pin
Mode
Access to PDRA
at $0010
Access to DDRA
at $0004
Access to Data
Register at $0000
Read
Write
Read/Write
Read
Write
1
X
0
IN, Hi-Z
U
PDIA0–7
DDRA0–7
I/O Pin
X
1
X
1
OUT
U
PDIA0–7
DDRA0–7
PA0–7
0
IN, Pulldown
U
PDIA0–7
DDRA0–7
I/O Pin
X
0
1
OUT
U
PDIA0–7
DDRA0–7
PA0–7
0
1
0
IN, Hi-Z
U
PDIA0–7
DDRA0–7
I/O Pin
X
0
1
OUT
U
PDIA0–7
DDRA0–7
PA0–7
NOTES:
X is don’t care state
U is an undened state
* 1 = pulldowns disabled
2 = pulldowns enabled
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