
Memory
MC68HC908GT16 MC68HC908GT8 Data Sheet, Rev. 3
32
Freescale Semiconductor
$001A
Keyboard Status
and Control Register
(INTKBSCR)
See page 109.
Read:
0
0
0
0
KEYF
0
IMASKK
MODEK
Write:
ACKK
Reset:
0
0
0
0
0
0
0
0
$001B
Keyboard Interrupt Enable
Register (INTKBIER)
See page 110.
Read:
KBIE7
KBIE6
KBIE5
KBIE4
KBIE3
KBIE2
KBIE1
KBIE0
Write:
Reset:
0
0
0
0
0
0
0
0
$001C
Timebase Module Control
Register (TBCR)
See page 216.
Read:
TBIF
TBR2
TBR1
TBR0
0
TBIE
TBON
R
Write:
TACK
Reset:
0
0
0
0
0
0
0
0
$001D
IRQ Status and Control
Register (INTSCR)
See page 102.
Read:
0
0
0
0
IRQF1
0
IMASK1
MODE1
Write:
ACK1
Reset:
0
0
0
0
0
0
0
0
$001E
Configuration Register 2
(CONFIG2)
See page 56.
Read:
R
0
EXT-
XTALEN
EXT-SLOW
EXT-
CLKEN
0
OSCENIN-
STOP
R
Write:
Reset:
0
0
0
0
0
0
0
0
$001F
Configuration Register 1
(CONFIG1)
See page 56.
Read:
COPRS
LVISTOP
LVIRSTD
LVIPWRD LVI5OR3
(1)
SSREC
STOP
COPD
Write:
Reset:
0
0
0
0
0
0
0
0
1. One-time writable register after each reset, except LVI5OR3 bit. LVI5OR3 bit is only reset via POR (power-on reset).
$0020
Timer 1 Status and Control
Register (T1SC)
See page 229.
Read:
TOF
TOIE
TSTOP
0
0
PS2
PS1
PS0
Write:
0
TRST
Reset:
0
0
1
0
0
0
0
0
$0021
Timer 1 Counter
Register High (T1CNTH)
See page 230.
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
0
0
0
0
0
0
0
0
$0022
Timer 1 Counter
Register Low (T1CNTL)
See page 230.
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset:
0
0
0
0
0
0
0
0
$0023
Timer 1 Counter Modulo
Register High (T1MODH)
See page 231.
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
1
1
1
1
1
1
1
1
$0024
Timer 1 Counter Modulo
Register Low (T1MODL)
See page 231.
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset:
1
1
1
1
1
1
1
1
$0025
Timer 1 Channel 0 Status and
Control Register (T1SC0)
See page 231.
Read:
CH0F
CH0IE
MS0B
MS0A
ELS0B
ELS0A
TOV0
CH0MAX
Write:
0
Reset:
0
0
0
0
0
0
0
0
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 7)