參數(shù)資料
型號: MC80C52XXX-25/883
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CDIP40
文件頁數(shù): 63/83頁
文件大?。?/td> 8336K
代理商: MC80C52XXX-25/883
76
7707F–AVR–11/10
AT90USB82/162
.Table 11-4 and Table 11-5 relate the alternate functions of Port B to the overriding signals
shown in Figure 11-5 on page 72. SPI MSTR INPUT and SPI SLAVE OUTPUT constitute the
MISO signal, while MOSI is divided into SPI MSTR OUTPUT and SPI SLAVE INPUT..
11.3.3
Alternate Functions of Port C
The Port C alternate function is as follows:
Table 11-4.
Overriding Signals for Alternate Functions in PB7..PB4
Signal
Name
PB7/OC0A/OC1C/PCI
NT7
PB6/PCINT6
PB5/PCINT5
PB4/T1/PCINT4
PUOE
0
PUOV
0
DDOE
0
DDOV
0
PVOE
OC0A/OC1C ENABLE
0
PVOV
OC0A/OC1C
0
DIEOE
PCINT7 PCIE0
PCINT6 PCIE0
PCINT5 PCIE0
PCINT4 PCIE0
DIEOV
1
DI
PCINT7 INPUT
PCINT6 INPUT
PCINT5 INPUT
PCINT4 INPUT
T1 INPUT
AIO
Table 11-5.
Overriding Signals for Alternate Functions in PB3..PB0
Signal
Name
PB3/MISO/PCINT3/PD
O
PB2/MOSI/PCINT2/P
DI
PB1/SCK/PCINT
1PB0/SS/PCINT0
PUOE
SPE MSTR
PUOV
PORTB3 PUD
PORTB2 PUD
PORTB1 PUD
PORTB0 PUD
DDOE
SPE MSTR
DDOV
0
PVOE
SPE MSTR
0
PVOV
SPI SLAVE OUTPUT
SPI MSTR OUTPUT
SCK OUTPUT
0
DIEOE
PCINT3 PCIE0
PCINT2 PCIE0
PCINT1 PCIE0
PCINT0 PCIE0
DIEOV
1
DI
SPI MSTR INPUT
PCINT3 INPUT
SPI SLAVE INPUT
PCINT2 INPUT
SCK INPUT
PCINT1 INPUT
SPI SS
PCINT0 INPUT
AIO
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