參數(shù)資料
型號: MC80C52XXX-25/883
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CDIP40
文件頁數(shù): 8/83頁
文件大小: 8336K
代理商: MC80C52XXX-25/883
153
Atmel ATmega16/32/64/M1/C1 [DATASHEET]
7647K–AVR–12/13
16.6.4 Stamping Message
The capture of the timer value is done in the MOb which receives or sends the frame. All managed MOb are stamped, the
stamping of a received (sent) frame occurs on RxOk (TXOK).
16.7
Error Management
16.7.1 Fault Confinement
The CAN channel may be in one of the three following states:
Error active (default):
The CAN channel takes part in bus communication and can send an active error frame when the CAN macro detects an
error.
Error passive:
The CAN channel cannot send an active error frame. It takes part in bus communication, but when an error is detected, a
passive error frame is sent. Also, after a transmission, an error passive unit will wait before initiating further transmission.
Bus off:
The CAN channel is not allowed to have any influence on the bus.
For fault confinement, a transmit error counter (TEC) and a receive error counter (REC) are implemented. BOFF and ERRP bits
give the information of the state of the CAN channel. Setting BOFF to one may generate an interrupt.
Figure 16-12. Line Error Mode
Note:
More than one REC/TEC change may apply during a given message transfer.
Reset
Interrupt BOFFIT
ERRP = 0
BOFF = 0
ERRP = 1
BOFF = 0
ERRP = 1
BOFF = 0
Error
Active
Error
Passive
Bus
Off
TEC > 255
TEC > 127
or
Rec 127
TEC ≤ 127
and
Rec ≤ 127
128 occurrences
of 11 consecutive
recessive bit
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